AM79C82A Search Results

14K14D

Abstract: dpc 050 hex Am79C82 H-14 79C83 AM79C82AGC np dpc 050 AMD Supernet AMD AM79C82A
Contextual Info: a Preliminary Advanced Micro Devices Am79C82A CMOS Data Path Controller DPC DISTINCTIVE CHARACTERISTICS • Performs reception and transmission of frames ■ Byte (8 + 1 bits) to word (32 + 4 bits) conversions ■ Reports error status ■ Performs parity check and generation

Contextual Info: Preliminary Am79C82A Advanced Micro Devices CMOS Data Path Controller DPC DISTINCTIVE CHARACTERISTICS • Performs reception and transmission of frames Performs parity check and generation ■ Byte (8 + 1 bits) to word (32 + 4 bits) conversions 145-lead pin grid array package

Contextual Info: Preliminary Am79C81 A Advanced Micro Devices CMOS RAM Buffer Controller RBC DISTINCTIVE CHARACTERISTICS • Total memory buffer management - 16-bit address bus supports 64K words (32 bits wide) with the Am79C82A Data Path Controller (DPC) - Programmable registers and pointers

Contextual Info: CI Preliminary Am79C82A Advanced Micro Devices CMOS Data Path Controller DPC DISTINCTIVE CHARACTERISTICS • Performs reception and transmission of frames Performs parity check and generation ■ Byte (8 + 1 bits) to word (32 + 4 bits) conversions 145-lead pin grid array package

nps a14

Abstract: np12 NP-12
Contextual Info: CI Preliminary Am79C81 A Advanced Micro Devices CMOS RAM Buffer Controller RBC DISTINCTIVE CHARACTERISTICS • Total memory buffer management - 16-bit address bus supports 64K words (32 bits wide) with the Am79C82A Data Path Controller (DPC) - Programmable registers and pointers

H-14

Abstract: Am79C83 dpc 050 hex AMD Supernet NP11 XMTA AM79C82 Am79C81
Contextual Info: a Preliminary Am79C81 A Advanced Micro Devices CMOS RAM Buffer Controller RBC DISTINCTIVE CHARACTERISTICS • Total memory buffer management - 16-bit address bus supports 64K words (32 bits wide) with the Am79C82A Data Path Controller (DPC) - Programmable registers and pointers

Contextual Info: Preliminary Cl Am79C82A Advanced Micro Devices CMOS Data Path Controller DPC DISTINCTIVE CHARACTERISTICS • Performs reception and transmission of frames Performs parity check and generation ■ Byte (8 + 1 bits) to word (32 + 4 bits) conversions 145-lead pin grid array package

Am79C83

Contextual Info: Am79C83 Fiber Optic Ring Media Access Controller FORMAC Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI) ■ Error detection capability

Am79c900

Abstract: AM7990 AMD Supernet
Contextual Info: NETWORKING SYSTEM OVERVIEW which consists of a Transmitter and Receiver chip and functions as a general-purpose interface for very high-speed point-to-point communications over coaxial or fiber-optic media. These products and plans for future ones continue to show our commit­

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range:

Am79C82

Contextual Info: P R E L IM IN A R Y Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 • Pointers to claim and beacon frames ■ Supports transmit linked-list addressing

am79c83

Abstract: am79c83gc H14E RB610
Contextual Info: H P relim inary Am79C83 Advanced Micro Devices Fiber Optic Ring Media Access Controller FORMAC DISTINCTIVE CHARACTERISTICS • ■ Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI)

Am79C82

Abstract: AM79C83GC AM79C83 THT bsc 25 H-14 NP10 xbxr carrier recovery AMD Supernet mach 1 to 5 from amd
Contextual Info: a Preliminary Am79C83 Advanced Micro Devices Fiber Optic Ring Media Access Controller FORMAC DISTINCTIVE CHARACTERISTICS • Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI) ■ Error detection capability

68230A

Abstract: pal16v8q PAL16R8ACN 99029 PAL16V8Q-15JC4 PAL16V8Z AM993 17640 8253 amd thermal analysis on pcb
Contextual Info: 9/5/01 PKG. TYPE CD 016 PD 016 PD 016 CD 020 CD 020 CD 020 CD 020 CD 020 PD 020 PD 020 Page 1 Thermal Resistance Analysis Update LD. FRM. NUMBER 18543 405 563 461 480 480 480 18550 590 590 X PAD DIM. MILS 167 140 150 127 160 160 160 167 150 150 MSD Advanced Assembly Technology

Contextual Info: P R E L IM IN A R Y Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Buffer-memory clock frequency range: 12.5 MHz to 25 MHz ■ Full-duplex operation: 200 Mbps continuous

AM79H1000T

Abstract: Am79C82 AM7969-125 TAXI Am79C83 SUPERNET
Contextual Info: ADV MICRO EÔE TELECOM 0ES75E7 D 0030103 T T - V /- 9 / Preliminary A m 7 9 h 1 0 0 0 T /A m 7 9 h 1 OOOR 1300nm Fiber Optic Transmitter/Receiver • Reliable 1300 nanometer MOVPE ELED (Am79h1000T) ■ Reliable InGaAs/lnP planar MOVPE PIN photodiode (Am79h1000R)

OE57S

Abstract: BD847 BDP282 Am79C82 AMD AM3 Processor Functional DD30 NP10 CC03X amd am3 pin latches BD23
Contextual Info: ADV MI CR O T E L E C O M 4ÖE D 0257527 0D30Ö05 fl • AMD3 P R E L IM IN A R Y Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS ■ Implements the FDDI Media Access Control (MAC) layer protocol for ISO standard 9314-2 Pointers to claim and beacon frames

Contextual Info: a PRELIMINARY Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 • ■ Supports transmit linked-list addressing ■ Buffer-memory clock frequency range:

AM79C83B

Contextual Info: a PR E LIM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range: