XMTA Search Results

PM7202

Abstract: bel 188 transistor pnp ST7032 10BASE2 10BASE5 P996 AMD PROMS SA5-27
Contextual Info: Am79C961A PCnet -ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for the Industry Standard Architecture ISA and Extended Industry Standard Architecture (EISA) buses

Am79C83

Contextual Info: Am79C83 Fiber Optic Ring Media Access Controller FORMAC Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI) ■ Error detection capability

SN75976A

Abstract: SN75LBC976 TR30 20 pin FRC connector si3750
Contextual Info: SN75976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218 - MAY 1995 • Improved Speed and Package Replacement for the SN75LBC976 • Designed to Operate at up to 20 Million Data Transfers per Second Fast-20 SCSI • Nine Differential Channels for the Data and

9718h

Abstract: 11973H VC12 LEVEL ONE COMMUNICATIONS SXT6051 SXT framer HT 648 Decoder Rx 9802h
Contextual Info: DATA SHEET MAY 1998 Revision 1.1 SXT6051 STM-1/0 SDH Overhead Terminator General Description Features The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0

12v to 1000v inverters circuit diagrams

Abstract: sck 104 NTC 74ACXX 74hc595 TI op closed-loop 60MHZ SCK 105 ntc simple filter turns square waves into sine waves LTC1402 LTC1402C LT1019 16PIN
Contextual Info: Final Electrical Specifications LTC1402 Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown October 1999 DESCRIPTION U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 2.2Msps 72dB S/ N + D and –89dB THD at Nyquist No Missing Codes over Temperature

schematic diagram surround sony

Abstract: cdi schematics pcb LQFP-144 recommended layout AN288 CS4953xx Hardware Users Manual 4 MBIT SERIAL FLASH MEMORY HYNIX cs493 SONY car service manual circuits sony car stereo spi flash parallel port
Contextual Info: CS4953x 32-bit Audio DSP Family CS4953xx H ardwa re Us er ’s Manual Preliminary Product Information This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright 2009 Cirrus Logic, Inc.

CS485xx Family Firmware Users Manual

Abstract: AN298 5.1 surround sound dolby pcb dolby sound system circuit diagrams all pinout dock ipod prologic II 5.1 CS48520 CS48520-CQZ CS48540-CQZ CS48540-DQZ
Contextual Info: CS485xx Family Data Sheet FEATURES ‰ Cost-effective, High-performance 32-bit DSP 300,000,000 MAC/S multiply accumulates per second Dual MAC cycles per clock 72-bit accumulators are the most accurate in the industry 24k x 32 SRAM, 2k blocks - assignable to data or program

AU-AIS

Abstract: SDH 209 E001 IXF6012 IXF6048 55236 GCIXF6012E w213 marking tuifdp marking f25 ku
Contextual Info: Intel IXF6012 51/155/622 Mbit/s SONET/SDH Cell/Packet Interface Datasheet Intel® IXF6012 is a single-chip interface solution for the transport of ATM cells or HDLC frames over SONET/SDH. Intel® IXF6012 can operate as a quad 51/155 Mbit/s or as a single

FL1043

Abstract: PCnet-Family PCI Ethernet Adapter PM7202 AM79C960 SA1015 CSR86 dtx 390 LADR0 0/FL1043 scsi isa controller electric diagrams
Contextual Info: PRELIMINARY Am79C960 PCnetTM-ISA Single-Chip Ethernet Controller Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for the Industry Standard Architecture ISA and Extended Industry Standard Architecture (EISA) buses ■ Provides integrated Attachment Unit Interface

74HC241

Abstract: 75LBC176 DB10 SN75LBC976
Contextual Info: SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D – AUGUST 1992 – REVISED MAY 1995 • • • • • • • • • Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface SCSI and Intelligent Peripheral Interface (IPI-2)

lt 7246

Contextual Info: AMDZ1 P R E L IM IN A R Y Am79C961 A PCnet -ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for the Industry Standard Architecture ISA and Extended Industry Standard Architecture (EISA) buses

Contextual Info: Advance Data Sheet September 1997 m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations L8575 Dual-Resistive, Low-Cost Subscriber Line Interface Circuit SLIC Features D escription • Two channels in a single package The L8575 is a dual-resistive, low-cost subscriber

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range:

SD8103

Abstract: SA1015 10BASE2 10BASE5 AM79C961A P996 PQB132 x 1-Bit Dynamic RAM DVSS10 aui to rj45
Contextual Info: PRELIMINARY Am79C961A PCnet -ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA DISTINCTIVE CHARACTERISTICS • Single-chip Ethernet controller for the Industry Standard Architecture ISA and Extended Industry Standard Architecture (EISA) buses

relay Driver circuit diagram

Abstract: L8575 relay driver XMTA
Contextual Info: Product Brief April 1998 L8575 Dual-Resistive, Low-Cost Subscriber Line Interface Circuit SLIC Features • Two channels in a single package ■ Serial data interface ■ Per-channel powerdown ■ Low standby power (≤65 mW per channel) ■ Integrated protection

Am79C82

Contextual Info: P R E L IM IN A R Y Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 • Pointers to claim and beacon frames ■ Supports transmit linked-list addressing

Contextual Info: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-170 SDH Overhead Terminator General Description The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides

7.1 dts decoder circuits

Contextual Info: CS4970x4 Data Sheet FEATURES High Definition Audio Decoder DSP Family with Dual 32-bit Engine Technology  Multi-standard 32-bit high-definition audio decoding plus post-processing  Supports high-definition audio formats including: — Dolby Digital Plus

krohne ifc 090

Abstract: Endress Hauser biffi actuator honeywell st3000 Yamatake honeywell honeywell CM42 xmt868 Yokogawa MAGNETROL vegason 62
Contextual Info: IndustrialIT FOUNDATION FIELDBUS Device Types for Freelance 800F Data Sheet Revision: July 2010 The following Device Types are interoperable with the Freelance 800F version 8.1 SP1, 8.2, 9.1 and 9.1RU1a. Freelance 800F Freelance 800F Freelance 8.1 SP1 FDT Base Container: 12.0.0.1

AN288 CS4953xx/CS497xxx Firmware Users Manual

Abstract: cinema drawings section details IEC61937-packed AN288 CS495303-CVZR CS4953xx Hardware Users Manual CS4970x4 Pacific Microsonics Dolby prologic II hdcd
Contextual Info: CS4953xx Data Sheet FEATURES 32-bit Audio Decoder DSP Family with Dual DSP Engine Technology ‰ Multi-standard 32-bit Audio Decoding plus Post Processing ‰ Large On-chip X, Y, and Program RAM & ROM ‰ SDRAM and Serial Flash Memory Support ‰ Framework Applications Library in ROM

7.1 surround sound dolby circuit diagrams

Contextual Info: CS4970x4 Data Sheet FEATURES High Definition Audio Decoder DSP Family with Dual 32-bit Engine Technology  Multi-standard 32-bit high-definition audio decoding plus post-processing  Supports high-definition audio formats including: — Dolby Digital Plus

14K14D

Abstract: dpc 050 hex Am79C82 H-14 79C83 AM79C82AGC np dpc 050 AMD Supernet AMD AM79C82A
Contextual Info: a Preliminary Advanced Micro Devices Am79C82A CMOS Data Path Controller DPC DISTINCTIVE CHARACTERISTICS • Performs reception and transmission of frames ■ Byte (8 + 1 bits) to word (32 + 4 bits) conversions ■ Reports error status ■ Performs parity check and generation

SN55LBC976

Abstract: 74HC241 DB10 SN55LBC176
Contextual Info: SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SGLS091A – JUNE 1995 – REVISED JANUARY 1997 D D D D D D D D D Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface SCSI and Intelligent Peripheral Interface (IPI-2)

74HC241

Abstract: 75LBC176 DB10 SN75LBC976
Contextual Info: SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D – AUGUST 1992 – REVISED MAY 1995 • • • • • • • • • Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface SCSI and Intelligent Peripheral Interface (IPI-2)