SRAM 34 PIN Search Results
SRAM 34 PIN Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| 27S07ADM/B |
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27S07A - Standard SRAM, 16X4 |
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| 27LS07DM/B |
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27LS07 - Standard SRAM, 16X4 |
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| 27S03/BEA |
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27S03 - SRAM - Dual marked (860510EA) |
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| 27S03ALM/B |
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27S03A - 64-Bit, Low Power Biploar SRAM |
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| 27S03ADM/B |
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27S03A - 64-Bit, Low Power Biploar SRAM |
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SRAM 34 PIN Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
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Contextual Info: H i g h Pe rf o rm a n c e A S7C4096 A S7 C 34 096 512Kx8 CMOS SRAM A 5 1 2 K x 8 CMOS SRAM Preliminary information Features Easy memory expansion with CE, OE inputs TTL-compatible, three-state I/O 36-pin JEDEC standard package - 400 mil SOJ Center power and ground pins for low noise |
OCR Scan |
S7C4096 512Kx8 36-pin AS7C34096) | |
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Contextual Info: DS1330W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1330W 3.3V 256K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 • Data is automatically protected during power loss |
OCR Scan |
DS1330W | |
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Contextual Info: DS1350YLPM/ABLPM PRODUCT PREVIEW DS1350YLPM/ABLPM 4096K Nonvolatile SRAM with Power Monitors DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • Data retention in the absence of Vcc 34 33 32 31 30 29 28 27 26 25 24 23 22 21 • Data is automatically protected during power loss |
OCR Scan |
DS1350YLPM/ABLPM 4096K DS1350YLPM) 2bl413D 000fl7b3 DS1350YLPM/ABLPM 68-pin | |
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Contextual Info: DS1350W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1350W 3.3V 4096K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during power loss |
OCR Scan |
DS1350W 4096K | |
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Contextual Info: DS1350W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1350W 3.3V 4096K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during power loss |
OCR Scan |
DS1350W 4096K | |
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Contextual Info: DS1330Y/AB DS1330Y/AB DALLAS SEMICONDUCTOR FEATURES 256K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is autom atically protected during power loss |
OCR Scan |
DS1330Y/AB | |
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Contextual Info: DS1350Y/AB DS1350Y/AB DALLAS SEMICONDUCTOR 4096K Nonvolatile SRAM with Battery Monitor FEATURES PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is autom atically protected during power loss |
OCR Scan |
DS1350Y/AB 4096K | |
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Contextual Info: DS 1230YL/BL DALLAS SEMICONDUCTOR DS1230YL/BL 256K Nonvolatile SRAM NOT RECOMMENDED FOR NEW DESIGNS. SEE DS1230Y/AB DATA SHEET. FEATURES PIN ASSIGNMENT • 10 years m inimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 |
OCR Scan |
1230YL/BL DS1230YL) DS1230BL) DS1230YL/BL DS1230evels DS1230TT-, 34-PIN | |
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Contextual Info: DS1330W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1330W 3.3V 256K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during power loss |
OCR Scan |
DS1330W | |
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Contextual Info: SDRAM AS4SD16M16 DOCUMENT TITLE 36Mb Pipelined Sync SRAM Rev # 1.7 1.8 1.9 AS4SD16M16 Rev. 1.7 3/2/09 History Text update on pg 8 &34, AC Spec update Removed “Consult Factory” pg 1 Update Micross Information Release Date March 2009 Status Release March 2009 |
Original |
AS4SD16M16 AS4SD16M16 -40oC -55oC 125oC A0-A12) | |
PLCC-34Contextual Info: DS1350Y/AB P R E L IM IN A R Y DALLAS SEMICONDUCTOR FEATURES DS1350Y/AB 4096K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • Built-in lithium battery provides more than 10 years of data retention 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during Vc c power |
OCR Scan |
DS1350Y/AB DS1350Y) DS1350AB) DS1350jTTR-l 34-pin D1350Y/AB 68-pin 34P-SM PLCC-34 | |
DS1265
Abstract: DS1265AB DS1265Y
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Original |
DS1265Y/AB DS1265Y/AB DS1265 DS1265AB DS1265Y | |
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Contextual Info: DS1345Y/AB P R E L IM IN A R Y DALLAS SEMICONDUCTOR FEATURES DS1345Y/AB 1024K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • Built-in lithium battery provides more than 10 years of data retention 34 33 32 31 30 29 28 27 26 25 24 23 • Data is automatically protected during V cc power |
OCR Scan |
DS1345Y/AB DS1345Y) DS1345AB) DS1345| 34-pin DS13345Y/AB D1345Y/AB 68-pin 34P-SM | |
740MILContextual Info: DS 1258Y/A B DALLAS SEMICONDUCTOR FEATURES DS1258Y/AB 128K x 16 Nonvolatile SRAM PIN ASSIGNMENT • 10 year m inimum data retention in the absence of external power CEU 40 39 3 38 4 37 5 36 6 35 7 34 8 33 9 32 DQ8 1 10 31 1 A9 DQ14 DQ13 DQ12 • Unlimited write cycles |
OCR Scan |
1258Y/A DS1258Y) DS1258AB) DS1258Y/AB 40-pin 740MIL | |
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Contextual Info: CY7C136-55NC 1/2 IL08 C-MOS 2 K x 8-BIT DUAL-PORT SRAM NC 39 38 37 36 35 34 33 32 31 30 29 28 27 —TOP VIEW— VDD GND NC 26 25 24 23 22 21 20 19 18 17 16 15 14 1 2 3 4 5 6 7 8 9 10 11 12 13 40 41 42 43 44 45 46 47 48 49 50 51 52 PIN NO. I/O SIGNAL PIN |
Original |
CY7C136-55NC | |
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Contextual Info: DS1345Y/AB • % a | ■ a D S 1 3 4 5 Y /A B a 1024K Nonvolatile SRAM U A L L A 9 with Battery Monitor s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • 10 y e a rs m in im u m d a ta re te n tio n in th e a b s e n c e of e x te rn a l p o w e r 34 33 |
OCR Scan |
DS1345Y/AB 1024K DS13345Y/AB | |
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Contextual Info: IDT7007S25PF 1/2 IL08 C-MOS 256 K (32,768 x 8)-BIT DUAL-PORT SRAM NC NC NC NC NC NC 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VDD GND NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NC VDD VDD NC GND GND NC NC 61 62 63 64 65 |
Original |
IDT7007S25PF | |
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Contextual Info: CY7C133 -55JC 1/2 IL08 C-MOS 2 K x 16-BIT DUAL-PORT SRAM 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 GND VDD GND 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 VDD 9 8 7 6 5 4 3 2 1 68 67 66 65 |
Original |
CY7C133 -55JC 16-BIT I/O10L I/O11L I/O12L I/O13L I/O36 I/O15R I/O15L | |
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Contextual Info: CY7C136-55JC IL08D C-MOS 2 K x 8 -BIT DUAL-PORT SRAM 8 47 48 49 50 51 VDD 52 1 2 3 4 5 6 7 —TOP VIEW— 5 16 46 9 45 10 44 15 14 13 11 43 12 42 13 41 12 11 10 14 40 15 39 9 8 7 47 36 16 38 17 37 38 37 39 19 NC 35 40 41 42 43 44 33 32 31 30 29 28 34 27 24 |
Original |
CY7C136-55JC IL08D | |
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Contextual Info: Preliminary GS8342D08/09/18/36BD-400/350/333/300/250 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package |
Original |
GS8342D08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, GS8342D36BD-300T. | |
GS81302D36E-250Contextual Info: GS81302D08/09/18/36E-375/350/333/300/250 144Mb SigmaQuadTM-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package |
Original |
GS81302D08/09/18/36E-375/350/333/300/250 165-Bump 165-bump, 144Mb 81302Dxx GS81302D36E-250 | |
GS8342D36BGD-250I
Abstract: GS8342D36BGD-300 GS8342D36BGD-333 GS8342D36BGD-350
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Original |
GS8342D08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, GS8342D36BD-300T. GS8342D36BGD-250I GS8342D36BGD-300 GS8342D36BGD-333 GS8342D36BGD-350 | |
GS8342Q36E-200
Abstract: GS8342Q36E-250 GS8342Q36E-300
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Original |
GS8342Q08/09/18/36E-300/250/200/167 165-Bump 165-bump, in-165-Pin GS8342Q08GE-200I 165-Pin GS8342Q08GE-167I GS8342x36E-200T. GS8342Q36E-200 GS8342Q36E-250 GS8342Q36E-300 | |
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Contextual Info: GS8662D08/09/18/36BD-400/350/333/300/250 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 72Mb SigmaQuad-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package |
Original |
GS8662D08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, GS8662D36BD-300T. AN1021 | |