SRAM 34 PIN Search Results

Contextual Info: H i g h Pe rf o rm a n c e A S7C4096 A S7 C 34 096 512Kx8 CMOS SRAM A 5 1 2 K x 8 CMOS SRAM Preliminary information Features Easy memory expansion with CE, OE inputs TTL-compatible, three-state I/O 36-pin JEDEC standard package - 400 mil SOJ Center power and ground pins for low noise

Contextual Info: DS1330W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1330W 3.3V 256K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 • Data is automatically protected during power loss

Contextual Info: DS1350YLPM/ABLPM PRODUCT PREVIEW DS1350YLPM/ABLPM 4096K Nonvolatile SRAM with Power Monitors DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • Data retention in the absence of Vcc 34 33 32 31 30 29 28 27 26 25 24 23 22 21 • Data is automatically protected during power loss

Contextual Info: DS1350W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1350W 3.3V 4096K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during power loss

Contextual Info: DS1350W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1350W 3.3V 4096K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during power loss

Contextual Info: DS1330Y/AB DS1330Y/AB DALLAS SEMICONDUCTOR FEATURES 256K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is autom atically protected during power loss

Contextual Info: DS1350Y/AB DS1350Y/AB DALLAS SEMICONDUCTOR 4096K Nonvolatile SRAM with Battery Monitor FEATURES PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is autom atically protected during power loss

Contextual Info: DS 1230YL/BL DALLAS SEMICONDUCTOR DS1230YL/BL 256K Nonvolatile SRAM NOT RECOMMENDED FOR NEW DESIGNS. SEE DS1230Y/AB DATA SHEET. FEATURES PIN ASSIGNMENT • 10 years m inimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23

Contextual Info: DS1330W PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1330W 3.3V 256K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during power loss

Contextual Info: SDRAM AS4SD16M16 DOCUMENT TITLE 36Mb Pipelined Sync SRAM Rev # 1.7 1.8 1.9 AS4SD16M16 Rev. 1.7 3/2/09 History Text update on pg 8 &34, AC Spec update Removed “Consult Factory” pg 1 Update Micross Information Release Date March 2009 Status Release March 2009

PLCC-34

Contextual Info: DS1350Y/AB P R E L IM IN A R Y DALLAS SEMICONDUCTOR FEATURES DS1350Y/AB 4096K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • Built-in lithium battery provides more than 10 years of data retention 34 33 32 31 30 29 28 27 26 25 24 23 22 • Data is automatically protected during Vc c power

DS1265

Abstract: DS1265AB DS1265Y
Contextual Info: DS1265Y/AB PRELIMINARY DS1265Y/AB 8M Nonvolatile SRAM FEATURES PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power NC 1 36 VCC NC 2 35 A19 A18 3 34 NC A16 4 33 A15 • Low–power CMOS operation A14 5 32 A17 • Read and write access times as fast as 70 ns

Contextual Info: DS1345Y/AB P R E L IM IN A R Y DALLAS SEMICONDUCTOR FEATURES DS1345Y/AB 1024K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • Built-in lithium battery provides more than 10 years of data retention 34 33 32 31 30 29 28 27 26 25 24 23 • Data is automatically protected during V cc power

740MIL

Contextual Info: DS 1258Y/A B DALLAS SEMICONDUCTOR FEATURES DS1258Y/AB 128K x 16 Nonvolatile SRAM PIN ASSIGNMENT • 10 year m inimum data retention in the absence of external power CEU 40 39 3 38 4 37 5 36 6 35 7 34 8 33 9 32 DQ8 1 10 31 1 A9 DQ14 DQ13 DQ12 • Unlimited write cycles

Contextual Info: CY7C136-55NC 1/2 IL08 C-MOS 2 K x 8-BIT DUAL-PORT SRAM NC 39 38 37 36 35 34 33 32 31 30 29 28 27 —TOP VIEW— VDD GND NC 26 25 24 23 22 21 20 19 18 17 16 15 14 1 2 3 4 5 6 7 8 9 10 11 12 13 40 41 42 43 44 45 46 47 48 49 50 51 52 PIN NO. I/O SIGNAL PIN

Contextual Info: DS1345Y/AB • % a | ■ a D S 1 3 4 5 Y /A B a 1024K Nonvolatile SRAM U A L L A 9 with Battery Monitor s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • 10 y e a rs m in im u m d a ta re te n tio n in th e a b s e n c e of e x te rn a l p o w e r 34 33

Contextual Info: IDT7007S25PF 1/2 IL08 C-MOS 256 K (32,768 x 8)-BIT DUAL-PORT SRAM NC NC NC NC NC NC 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VDD GND NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NC VDD VDD NC GND GND NC NC 61 62 63 64 65

Contextual Info: CY7C133 -55JC 1/2 IL08 C-MOS 2 K x 16-BIT DUAL-PORT SRAM 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 GND VDD GND 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 VDD 9 8 7 6 5 4 3 2 1 68 67 66 65

Contextual Info: CY7C136-55JC IL08D C-MOS 2 K x 8 -BIT DUAL-PORT SRAM 8 47 48 49 50 51 VDD 52 1 2 3 4 5 6 7 —TOP VIEW— 5 16 46 9 45 10 44 15 14 13 11 43 12 42 13 41 12 11 10 14 40 15 39 9 8 7 47 36 16 38 17 37 38 37 39 19 NC 35 40 41 42 43 44 33 32 31 30 29 28 34 27 24

Contextual Info: Preliminary GS8342D08/09/18/36BD-400/350/333/300/250 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS81302D36E-250

Contextual Info: GS81302D08/09/18/36E-375/350/333/300/250 144Mb SigmaQuadTM-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8342D36BGD-250I

Abstract: GS8342D36BGD-300 GS8342D36BGD-333 GS8342D36BGD-350
Contextual Info: Preliminary GS8342D08/09/18/36BD-400/350/333/300/250 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8342Q36E-200

Abstract: GS8342Q36E-250 GS8342Q36E-300
Contextual Info: Preliminary GS8342Q08/09/18/36E-300/250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: GS8662D08/09/18/36BD-400/350/333/300/250 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 72Mb SigmaQuad-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package