SQA3 Search Results

416W

Abstract: 100-OHM
Contextual Info: DS90LV804 DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater Literature Number: SNLS195K DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater General Description Features The DS90LV804 is a four channel 800 Mbps LVDS buffer/ repeater. In many large systems, signals are distributed

DS15br400

Abstract: 416W
Contextual Info: DS15BR400,DS15BR401 DS15BR400/DS15BR401 4-Channel LVDS Buffer/Repeater with Pre-Emphasis Literature Number: SNLS224F DS15BR400/DS15BR401 4-Channel LVDS Buffer/Repeater with Pre-Emphasis General Description Features The DS15BR400/DS15BR401 are four channel LVDS buffer/

SQA3

Abstract: SQB3
Contextual Info: SIEM ENS 868352-Bit Dynamic Sequential Access Memory for Television Applications TV-SAM SDA 9251-2X Preliminary Data CMOS 1C Features • • • • • • • • • • • • • • • • • 212 x 64 x 16 x 4-bit organization Triple port architecture

Contextual Info: LM5119/LM5119Q www.ti.com SNVS676F – AUGUST 2010 – REVISED FEBRUARY 2013 LM5119/LM5119Q Wide Input Range Dual Synchronous Buck Controller Check for Samples: LM5119/LM5119Q FEATURES 1 • 2 • • • • • • LM5119Q is an Automotive Grade product that

Contextual Info: AN-2021 LM3753/54 Evaluation Board User's Guide Literature Number: SNVA420 December 2009 Contents 1 2 Introduction . 5 Powering and Loading Considerations . 5

LMX2581

Abstract: fractional N PLL
Contextual Info: LMX2581 Wideband Frequency Synthesizer with Integrated VCO General Description Features The LMX2581 is an ultra low noise wideband frequency synthesizer which integrates a delta-sigma fractional N PLL, a VCO with fully integrated tank circuit, and an optional frequency divider.

Contextual Info: J t / i Texas " DS90UR907Q In s t r u m e n t s 5 - 6 5 MHz 24-bit Color FPD-Link to FPD-Link II Converter Features S 5 ± 65 MHz support 140 Mbps to 1.82 Gbps Serial Link Serial transmission is optimized by a user selectable de-emphasis and differential output level select features. EMI is

Contextual Info: LMK00306 3-GHz 6-Output Differential Clock Buffer/Level Translator 1.0 General Description • Servers, Workstations, and Computing The LMK00306 is a 3-GHz, 6-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution

AEC-Q100

Abstract: automotive ecu manual "parking sensor" MCU
Contextual Info: DS90UB901Q/DS90UB902Q 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel General Description The DS90UB901Q/DS90UB902Q chipset offers a FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single

DS92LX1622

Abstract: DS92LX1621 DS92LX1622SQE DS92LX1621SQ "frame grabber"
Contextual Info: DS92LX1621 / DS92LX1622 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel General Description • Embedded clock with DC Balanced coding to support AC- The DS92LX1621 / DS92LX1622 chipset offers a Channel

National RS-12V

Abstract: SI7884 LLP32 B 221K 2KV ic driver mosfet 8 pin 12V-VCC 221k 2kv FB111 LM25119 amp mosfet schematic circuit
Contextual Info: ご注意 ： こ の日本語デー タ シー ト は参考資料 と し て提供 し てお り 内容が最新でない 場合があ り ます。製品のご検討およびご採用に際 し ては、必ず最新の英文デー タ シー ト を ご確認 く だ さ い。

DS42MB100

Abstract: DS42MB100TSQ
Contextual Info: DS42MB100 4.25 Gbps 2:1/1:2 CML Mux/Buffer with Transmit PreEmphasis and Receive Equalization General Description Features The DS42MB100 is a signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy or cable driving applications. Signal conditioning features include input equalization and programmable output pre-emphasis that enable data communication in FR4 backplane up

LLP32

Abstract: LM25119 LM25119PSQE 151K 2KV
Contextual Info: LM25119 Wide Input Range Dual Synchronous Buck Controller General Description Features The LM25119 is a dual synchronous buck controller intended for step-down regulator applications from a high voltage or widely varying input supply. The control method is based upon current mode control utilizing an emulated current ramp.

Contextual Info: May 2007 ADC12C105 12-Bit, 95/105 MSPS A/D Converter General Description Features NOTE: This is Preliminary Information for products currently in development. ALL specifications are design targets and are subject to change. The ADC12C105 is a high-performance CMOS analog-todigital converter capable of converting analog input signals

Contextual Info: DS91M040 125 MHz Quad M-LVDS Transceiver General Description Features The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks. M-LVDS Multipoint LVDS is a new family of bus interface

Contextual Info: LP5551 PowerWise Technology Compliant Energy Management Unit General Description Features The LP5551 is a PWI 1.0 compliant Energy Management System for reducing power consumption of stand-alone mobile phone processors such as base-band or applications

obsai

Contextual Info: DS25MB100 2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit DeEmphasis and Receive Equalization General Description Features The DS25MB100 is a signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy or cable driving applications. Signal conditioning features include input equalization and programmable output de-emphasis that enable data communication in FR4 backplane up

3da92

Contextual Info: bSE D • ÔE3StiGS GDS3414 =144 ISIE6 SIEM ENS SIEMENS AKTIENGESELLSCHAF 868352 - Bit Dynamic Sequential Access Memory for Television Applications TV - SAM Preliminary Data SDA 9251X CMOS IC Features • 212 x 64 x 16 x 4 bit organization • Triple port architecture

l6722

Contextual Info: DS91M040 DS91M040 125 MHz Quad M-LVDS Transceiver Literature Number: SNLS283L DS91M040 125 MHz Quad M-LVDS Transceiver General Description Features The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four

ADC12C105

Abstract: ADC12C105CISQ ADC12C105CISQE ADC12C105EB AN-905
Contextual Info: ADC12C105 12-Bit, 95/105 MSPS A/D Converter General Description Features The ADC12C105 is a high-performance CMOS analog-todigital converter capable of converting analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second MSPS . This converter uses a differential, pipelined

412060

Contextual Info: LMX2541 LMX2541 Ultra-Low Noise PLLatinum Frequency Synthesizer with Integrated VCO Literature Number: SNOSB31G LMX2541 Ultra-Low Noise PLLatinum Frequency Synthesizer with Integrated VCO General Description Features The LMX2541 is an ultra low noise frequency synthesizer

Contextual Info: November 10, 2008 LMH6517 Multi Standard, IF and Baseband, Dual, DVGA General Description Features The LMH6517 contains two high performance digitally controlled variable gain amplifiers DVGA . It has been designed for use in narrowband and broadband IF sampling applications. Typically the LMH6517 drives a high performance ADC

AN-1187

Abstract: AN-1194 DS90LV804 DS90LV804TSQ DS90LV804TSQX
Contextual Info: DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater General Description Features The DS90LV804 is a four channel 800 Mbps LVDS buffer/ repeater. In many large systems, signals are distributed across cables and signal integrity is highly dependent on the data rate, cable type, length, and the termination scheme. In

dap 11

Abstract: SQA32A LMH7324 OA-15
Contextual Info: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない 場合があります。製品のご検討およびご採用に際しては、必ず最新の英文デー タシートをご確認ください。