SGRAM Search Results

KM4132G512Q

Abstract: BA 59 04A F P SM 11039 sgram
Contextual Info: SGRAM MODULE KM M 965G112Q P N / KMM966G112Q(P)N 8MB SGRAM MODULE (1 Mx64 SODIMM based on 512Kx32 SGRAM) Unbuffered SGRAM Graphics 64-bit Non-ECC/Parity 144-pin SODIMM Revision 2.1 March 1998 . i _ &prrranNre This Material Copyrighted By Its Respective Manufacturer

Contextual Info: IBM13V25649AP IBM13V51649AN IBM13V25649AN IBM13V51649AP 256K/512K x 64 SGRAM SO DIMM Features 144 Pin Graphics JEDEC Standard, 8 Byte Synchro­ nous Small Outline Dual-In-line Memory Module Performance: Speed Grade 7R5 ! 10 ! Units I I Clock Frequency 133 ! 100 ! MHz

F-100

Abstract: ML6553 ML6553CS-1
Contextual Info: www.fairchildsemi.com ML6553 Bus Termination Regulator Features General Description • Can source and sink up to 1A • Generates termination voltages for DDR SDRAM, SSTL_2 SDRAM, SGRAM, or equivalent memories • Generates termination voltages for active termination

SMD 7014

Contextual Info: www.fairchildsemi.com ML6554 3A Bus Termination Regulator Features Description • Can source and sink up to 3A, no heat sink required • Integrated Power MOSFETs • Generates termination voltages for DDR SDRAM, SSTL-2 SDRAM, SGRAM, or equivalent memories

SGRAM

Abstract: towerpro SO-DIMM 144-pin
Contextual Info: DMS Series - SO - DIMM Sockets 144-pin for SGRAM module SO-DIMM sockets for SGRAM’s are made of hi-temp resistant LCP. Available in two different PC-board distances. Insertion & extraction of the module can be made without any tools. Positive polarization prevents wrong insertion of the module.

DMX RECEIVER

Abstract: HYB39 HYB39D32322TQ LQFP100 infineon sgram SGRAM
Contextual Info: Memories for Graphics Systems 32Mbit DDR SGRAM HYB39D32322TQ -6 -A2 Die revision A2 User’s Manual Version 2.12 06.2000 Edition 06.2000 This edition was realized using the software system FrameMaker. Published by Infineon Technologies, Marketing-Kommunikation,

Hitachi DSA00164

Contextual Info: HM5216326 Series 16M LVTTL interface SGRAM 125 MHz/100 MHz/83 MHz 256-kword x 32-bit × 2-bank ADE-203-678E Z Rev. 2.0 Oct. 2, 1998 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5216326 provides 2 banks to realize better performance. 8 column block write function and write per bit function are provided

MB81G83222-010

Abstract: MB81G83222-012 MB81G83222-015 MB81G83222PQ 216-0040
Contextual Info: To Top / Lineup / Index FUJITSU SEMICONDUCTOR DATA SHEET DS05-12101-2E MEMORY CMOS 2 x 128K × 32 SYNCHRONOUS GRAM MB81G83222-010/-012/-015 CMOS 2 BANKS OF 131,072-WORDS × 32-BIT SYNCHRONOUS GRAPHIC RANDOM ACCESS MEMORY • DESCRIPTION The Fujitsu MB81G83222 is a CMOS Synchronous Graphic Random Access Memory SGRAM containing

Siemens SCR components Data Manual

Abstract: HYB39S16320TQ HYB39S16320TQ-6 HYB39S16320TQ-7 HYB39S16320TQ-8 SIEMENS BST t
Contextual Info: Memories for Graphics Systems 16M Synchronous Graphics RAM SGRAM HYB39S16320TQ-6 HYB39S16320TQ-7 HYB39S16320TQ-8 Version 2.1.00 Preliminary Information SGRAM 1.1999 HYB39S16320TQ-6/-7/-8 Revision History: Current Version 2.1.00 Previous Version: 1.x.xx Page

Contextual Info: ESMT SGRAM M32L1632512A 256K x 32 Bit x 2 Banks Synchronous Graphic RAM FEATURES GENERAL DESCRIPTION y y y y The M32L1632512A is 16, 777, 216 bits synchronous high data rate Dynamic RAM organized as 2 x 262, 144 words by 32 bits, fabricated with ESMT’s high performance CMOS technology. Synchronous

1024X256

Contextual Info: MEMORY 2 x 256K x 32 BIT SYNCHRONOUS GRAPHIC RA CMOS 2-Bank of 262,144-Word x 32 Bit Synchronous Graphie Random Access Memory • DESCRIPTION The Fujitsu MB81G163222 is a CMOS Synchronous Graphie Random Access Memory SGRAM containing 16,777,216 memory cells accessible in an 32-bit tormat. The MB81G163222 teatures a fully synchronous

Contextual Info: ADVANCE 512K x 32 DDR SGRAM MICRON I TECHNOLOGY, INC. MT45V512K32 - 128K x 32 x 4 banks DOUBLE DATA RATE SGRAM For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES • Internal, pipelined double data rate DDR architec­

Contextual Info: ADVANCE M IC R O N I MT41 LC256K32D4 S 256K x 32 SGRAM f ^ D A D U I f ^ C n A R /l w r iM IV I n M r n l V / O 256K x 32 SGRAM PULSED RAS, DUAL BANK, p i p e lin e d ,3 .3 V o p e r a t io n NEW SYNCHRONOUS FEATURES OPTIONS MARKING • Timing 10ns access

Contextual Info: ADVANCE MICRON I 256K’512Kx64 SGRAM SODIMMs TECHNOLOGY. INC. SYNCHRONOUS GRAPHICS RAM DIMM mt2lg25664 K h MT4LG51264,K)H FEATURES PIN ASSIGNMENT (Front View) • 144-pin, sm all-outline, dual in-line m emory module (DIMM) • 2MB (256K x 64) and 4MB (512K x 64)

HY58163210TQ-8F

Abstract: HY58163210TQ-10F
Contextual Info: 512Kx32bit Synchronous Graphics RAM HY58163210 PRELIMINARY DESCRIPTION The sixteen megabit Synchronous Graphics RAM SGRAM is a single port, application specific memory device designed for graphics applications. It is organized as 256K words per bank x 32 bits

timing controller SHART

Abstract: T21N K4U52324Q SAMSUNG GDDR4 K4U52324QE-BC09 GDDR4
Contextual Info: 512M GDDR4 SGRAM K4U52324QE 512Mbit GDDR4 SGRAM 2M x 32Bit x 8 Banks Graphic Double Data Rate 4 Synchronous DRAM with Uni-directional Data Strobe and DLL 136Ball FBGA Revision 1.0 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

Contextual Info: HYM8V6451210 PG-Series SO DIMM 512Kx64 bit SGRAM MODULE based on 512Kx32 SGRAM, LVTTL, 1K-Refresh PRELIMINARY DESCRIPTION The HYM8V6451210 is high speed 3.3 Volt Synchronous Graphic RAM module consisting of two 512Kx32 bit Synchronous GRAMs in 100pin QFP on a 144 pin glass-epoxy circuit board. 0.1µF and 0.01µF

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS05-12102-3E MEMORY CMOS 2 x 256K × 32 BIT SYNCHRONOUS GRAPHIC RAM MB81G163222-70/-80/-10 CMOS 2-Bank of 262,144-Word × 32 Bit Synchronous Graphic Random Access Memory • DESCRIPTION The Fujitsu MB81G163222 is a CMOS Synchronous Graphic Random Access Memory SGRAM containing

mg802c256q

Abstract: G802C256
Contextual Info: <♦ M G802C256 Ultra Low Latency, High Performance M o Sys’ 256Kx32 SGRAM Preliminary Inform ation !g§|oooooooooo|f Features DQ3_1 VccQr-12 DQ4 : 3 DQ5c: 4 VSSQ- □ 5 DQ6! 13 DQ7i 17 VccQ! 18 DQ16:- y DQ17 J 1U VssQ! I 11 DQ18: 12

Contextual Info: 16M DDR SGRAM KM432D5131 16Mbit DDR SGRAM 128K x 32Bit x 4 Banks Double Data Rate Synchronous Graphic RAM with Bi-directional Data Strobe Revision 1.1 December 1998 Samsung Electronics reserves the right to change products or specification without notice.

Contextual Info: PRELIMINARY DATA SHEET_ MOS INTEGRATED CIRCUIT jUPD4811650 for Rev.E 16 M-BIT SYNCHRONOUS GRAM 256K-WORD BY 32-BIT BY 2-BANK Description The ,uPD4811650 is a synchronous graphics memory SGRAM organized as 262,144 words x 32 bits x 2 banks

Contextual Info: / Trident Product Brief Cyber9397/95&#39; High Performance 3D Multimedia Flat Panel Controller Features • Single-Cycle 3D GUI engine with on-chip Setup Engine • ClearTV for flicker free TV-Output • Single-Cycle EDO DRAM/SDRAM/SGRAM l/F 1/2/4MB • Independent refresh rate for simultaneous display

MS82V48540

Contextual Info: PEDS82V48540-01 1Semiconductor MS82V48540 This version: Jul. 2001 Preliminary 393,216-Word x 32-Bit × 4-Bank FIFO-SGRAM GENERAL DESCRIPTION The MS82V48540 is a 48-Mbit system clock synchronous dynamic random access memory. In addition to the conventional random read/write access function, the MS82V48540 provides the automatic row address increment

Contextual Info: AMP METRIC SO DIMM Sockets Catalog 1307612 Dimensions are millimeters over inches Revised 7-01 Dual Read-Out Sockets for SDRAM and SGRAM Product Facts • Sockets Dual Read-Out SDRAM and SGRAM ■ Cam-in module loading provides easy insertion ■ Positive wipe on pads