S555H Search Results

00F1H

Contextual Info: • v p a c _MX29F1 610 1 B M -B IT C 2 M x S / 1 M x 1 6 C M O S S IN G U E V O L T A G E F L A S H E E P R O M FEATURES • • • • • • • • • 5V ± 10% write and erase JEDEC-standard EEPROM commands Minimum 1,000/10,000 write/erase cycles

29F080

Abstract: S29F080
Contextual Info: Preliminary information Features • O rg a n iz a tio n : 1M x 8 • S ecto r a rc h ite c tu re - Sixteen 64K byte sectors - Equal sector architecture - Erase any com bination o f sectors or full chip • Single 5 .0 ± 0 .5 V p o w e r s u p p ly f o r r e a d / w r ite o p e ra tio n s

Contextual Info: Hiyli P e r f o r m a n c i 1 •■ AS29F400 A S I 2 K x 8 / 2 S6 K X I 6 SV C M O S F l a s h F F P R O M S I 2 K x 8 / 2 5 6 K x l 6 CMOS Flush FFPROM Prelim inary inform ation Features • Organization: 512KX8 or 256KX16 • Sector architecture • L o w p o w e r c o n s u m p tio n

Contextual Info: H ig h p e r f o r m a n c e 256K X8/128K X16 5 V C M O S F la s h E E P R O M « II A S29F200 A 2 5 6 K X 8 / 1 2 8 K X 1 6 C M O S Flash EEPROM Preliminary information Features • S ector a rc h ite c tu re - One 16K; tw o 8K; one 32K; and three 64K byte sectors

Contextual Info: I l i ^ h l*i i loi i n ,iih c S I 2k x X r>V C M O S Ma sh MiPKOM •■ \ S 2 >M 40 A S I ?.KX<S CMOS f ldsli I I f'KOM Preliminary information Features • Low power consumption • Organization: 512KX8 • Sector architecture - 3 0 m A m a x im u m re a d c u rre n t

29f200-90

Abstract: 29F200 flash tcp 8111 D370 344c1 es 3880 fm AS29F200T
Contextual Info: H igh Performance 256K x8/128 « I6 X AS29F200 Kl SV CMOS Flash FFPROM 2 M e g a b i t 5 V CMOS i-lash EEPROM Preliminary information Features • O rg a n iza tio n : 25 6 K x 8 o r 1 2 8 K x l 6 • Sector a rch itectu re - O n e 1 6K ; tw o 8K ; o n e 3 2 K ; a n d th r e e 6 4 K b y te s e c to rs

00D05

Abstract: AS29F040 29F040 29F040-70
Contextual Info: H ig h P e r f o r m a n c e 512KX8 S V C M O S F la s h EEPRO M « II J J i A S29F040 5 1 2 K X 8 CMOS Flash EEPROM Preliminary information Features • Organization: 5 1 2 Kx 8 • Sector architecture • Low pow er consum ption - 30 m A m a x im u m rea d c u rre n t

AM29F080

Abstract: SA12 SA13 SA14 SA15 AM29F0808
Contextual Info: PRELIM INARY a Am29F080 8 Megabit 1,048,576 x 8-Bit CMOS 5.0 Volt-only, Sector Erase Flash Memory Advanced Micro Devices d is t in c t iv e c h a r a c t e r is t ic s • 5.0 Volt ± 10% for read and write operations — Minimizes system level power requirements

Contextual Info: H i j j h P i - r f o r m a i K <.• L BB SV C M O S I la s h 1 I P R O M 2 A S 2 l> I ' 2 0 0 A S6K X 8/IZ8K x I6 6 K x 8 / I 2 8 K x 1 6 C M O S Jf /.isii I'I P K O M Preliminary information Features • Organization: 256KX8 or 128KX16 • Sector architecture

Contextual Info: H igh p erfo rm an ce 512Kx8/256Kxl6 5V CMOS Flash EEPROM U A S 29F 400 A 512Kx8/256Kx 16 CMOS Flash EEPROM Preliminary information Features • O r g a n iz a tio n : 5 1 2 K X 8 o r 2 5 6 K X 1 6 • L o w p o w e r c o n s u m p t io n • S e c to r a r c h it e c tu r e

Contextual Info: TO SHIBA TH 50VSF1302/1303AAXB TENTATIVE TOSHIBA MULTI CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRA M AN D FLASH M E M O R Y M IXED MULTI-CHIP PACKAGE DESCRIPTION T he T H 50V SF 1302/1303A A X B is a m ix ed c o n ta in in g a p ack ag e 2,0 0 7 ,1 6 2 -b it SRAM a n d a 8,388,608-

GA1030

Contextual Info: TMS29F040 524288 BY 8-BIT FLASH MEMORY . • • • • • • • • • • SMJS820B - APRIL 1996 - REVISED NOVEMBER 1997 Single Power Supply 5 V ± 10% - 3.3 V ± 0.3 V - See ’29LF040/ 29VF040 Data Sheet Literature Number SMJS825 - 2.7 V to 3.6 V - See ’29LFO40/&#39;29VFO4O

29F400-70

Abstract: 29f400 programming 29F400 9F400 29F400-90
Contextual Info: H ig h P erfo rm a n ce 512KX8/256KX16 5 V CMOS Flash EEPROM - A S29F400 II J ill r 5 1 2 K x 8 / 2 5 6 K x l 6 CMOS Flash EEPROM Preliminary information Features • O rganization: 5 1 2 K X 8 or 2 5 6 K x l 6 • Sector architecture - One 16K; two 8K; one 32K; and seven 64K byte sectors

Z134

Contextual Info: “H Y U N D A I HY29F080 Series 1M x 8-bit CMOS 5.0 volt-only, Sector Erase Flash Memory KEYFEATURES • S.O V 10% Read, Program, and Erase - Minimizes system-ievel power requirements • High performance - 55 ns access time • Internal Programming Algorithms

29F400-70

Abstract: programming 29F400 29f400 256KX16 AS29F400T-70S1 T00344 XX11110 JS2617 29F400-90
Contextual Info: A H i y l i P c r f o r n i a i H i' S I2K X 8/2S 6K X SV CM O S •■ I6 Flash F.FPR O M A S29F400 Î I 2 K X 8 / 2 5 6 K X 16 C M O S F l u s h F E P R O M Preliminary information Features • Organization: 512KX8 or 256KX16 • Sector architecture • Low pow er consum ption

A14C

Abstract: M28256 S028 Scans-005192
Contextual Info: S G S -IH O M S O N M28256 filD @ ® II L i© in ( 2 R ! lD ( g ® PARALLEL 256K (32K x 8) EEPROM WITH SOFTWARE DATA PROTECTION PRELIMINARY DATA FAST ACCESS TIME: 90ns SINGLE 5V ± 10% SUPPLY VOLTAGE LOW POWER CONSUMPTION FAST WRITE CYCLE: - 64 Bytes Page Write Operation

Q20G

Abstract: 00F1H MX-2S
Contextual Info: is M « r r c a M FEATURES • • • • • • • • • 5V ± 10% write and erase JEDEC-standard EEPRO M commands Minimum 1,000/10,000 write/erase cycles Fast access time: 100/120/150ns Sector erase architecture - 16 equal sectors of 128k bytes each

mxab

Abstract: IX-29
Contextual Info: _ _ _ _ _ _ _ _ _M X 2 FEATURES • • • • • • • • • 9 F8 1 OO 8 M - B r r t 'IM x 8 / 5 * 1 H K x I S C M O S S IN G L E V O L T A G E F L A S H E E P R O M 5V ± 10% write and erase JEDEC-standard EEPROM commands Minimum 1,000/10,000 write/erase cycles

1X16

Abstract: 1X32 BA911
Contextual Info: T O S H IB A TC58F400F/401F/FT-90,10 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 4-MBIT 524,288 WORDS X8 BITS/262,144 WORDS x16 BITS CMOS FLASH MEMORY DESCRIPTION The TC58F400/401 is a 4,194,304-bit electrically erasable and programmable flash memory organized

Contextual Info: T O SH IB A TH50VSF1320/1321A A X B TENTATIVE TOSHIBA MULTI CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRAM AND FLASH M EM ORY MIXED MULTI-CHIP PACKAGE DESCRIPTION The TH50VSF1320/1321AAXB is a mixed containing a package 2,097,152-bit SR A M and a 8,388,608bit fla s h m em ory. The SR A M ia organ ized as 262,144 w ords by 8 bits an d th e fla sh m em o ry is

Contextual Info: H igh perform an ce 512K X 8 5 V CMOS Flash EEPROM n A S29F040 II. II W llh . 5 1 2 K x 8 CM O S Flash EEPROM Preliminary information Features • Low pow er consum ption • Organization: 512K X 8 • Sector architecture • • • • - 3 0 m A m ax im u m read current

D28C256

Contextual Info: NEC JUPD28C256 32,768 X 8-Bit CMOS EEPROM NEC Electronics Inc. Description Pin Configuration The ¿/PD28C256 is a 262,144-bit electrically erasable and programmable read-only memory EEPROM orga­ nized as 32,768 x 8 bits and fabricated with an ad­ vanced CMOS process for high performance and low

Contextual Info: H igh Perform ance S12KX8 SV CMOS Flash EEPROM « A S29F040 II II 512K X 8 CMOS Flash EEPROM Preliminary information Features • Low power consumption • Organization: 512Kx8 • Sector architecture - 30 mA m axim um read current - 60 mA m ax im u m program current

Contextual Info: S A M S UN G E L E C T R O N I C S INC b7E D 7 ^ 4 1 4 2 GDlbSDM 21^ KM28C256 CMOS EEPROM 32K x 8 Bit CMOS Electrically Erasable PROM FEATURES GENERAL DESCRIPTION • Operating Temperature Range — KM28C256: Commercial — KM28C256I: Industrial • Simple Byte Write & Page Write