S0098 Search Results

Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

ONET4291PA

Abstract: SDD11
Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

Contextual Info: S E M Revised Ja nuary 1999 I C O N D U C T O R TM 74ACT818 8-Bit Diagnostic Register General Description Features The AC T818 is a high-speed, general-purpose pipeline register with an on-board diagnostic register for perform ing serial diagnostics a nd /or w ritable control store loading.

Contextual Info: J uly 1988 Revised D ecem ber 1998 SE M ¡CONDUCTOR TM 74ACT843 9-Bit Transparent Latch General Description Features T h e AC T843 bus interface latch is designed to elim inate the extra packages required to buffer existing latches and provide extra data w idth for w id e r address/data paths.

Si6466ADQ

Abstract: S-00984
Contextual Info: Si6466ADQ New Product Vishay Siliconix N-Channel 2.5-V G-S MOSFET PRODUCT SUMMARY VDS (V) 20 rDS(on) (W) ID (A) 0.014 @ VGS = 4.5 V 8.1 0.020 @ VGS = 2.5 V 6.6 D TSSOP-8 8 D 7 S 3 6 S 4 5 D D 1 S 2 S G D Si6466ADQ * Source Pins 2, 3, 6 and 7 must be tied common.

Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

74LS260N

Abstract: 54LS260J
Contextual Info: S E M IC O N D U C T O R tm DM74LS260 Dual 5-Input NOR Gate General Description This device contains tw o individual five input gates, each of w hich perform the logic N OR function. Connection Diagram D ual-ln-Line Package 14 2 T 13 r 5 * JO 6 _ | 1_ 9-

Contextual Info: S E M IC O N D U C T O R tm DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description This device contains four independent gates, each of which perform s the logic exclusive-O R function. Connection Diagram Dual-ln-Line Package

Contextual Info: S E M IC O N D U C T O R tm DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a com m on C lock and an asynchronous active LOW M aster Reset. This device is supplied in a 20-pin

QFN 64 PACKAGE rth

Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

Contextual Info: A I R C H I L D Ju|y 1988 Revised D ecem ber 1998 SEMICONDUCTOR TM 74ACT843 9-Bit Transparent Latch General Description Features T h e AC T843 bus interface latch is designed to elim inate the extra packages required to buffer existing latches and provide extra data w idth for w id e r address/data paths.

Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

74AC299

Abstract: 74AC299PC 74AC299SC 74AC299SJ 74ACT299 M20D MS-001
Contextual Info: R e v is e d O c to b e r 199 8 74AC299 • 74ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins General Description Features T h e A C /A C T 2 9 9 is a n 8-bi1 u n iv e rs a l s h ift/s to ra g e re g is te r w ith 3-S T A T E o u tp u ts . F o u r m o d e s o f o p e ra tio n a re p o s s i­

100323PC

Abstract: 100323QC F100K MO-047 MS-011 N24E V28A
Contextual Info: n U 'y19!8 M K icoo R e v is e d N o v e m b e r 199 9 TM 100323 Low Power Hex Bus Driver General Description Features T h e 1 0 0 3 2 3 is a m o n o lith ic d e v ic e c o n ta in in g s ix b u s d riv ­ • 5 0 % p o w e r re d u c tio n o f th e 1 0 0 1 2 3

ONET4291PA

Abstract: SDD11
Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

Si3585DV

Contextual Info: Si3585DV New Product Vishay Siliconix N- and P-Channel 20-V D-S MOSFET PRODUCT SUMMARY VDS (V) N-Channel 20 P-Channel –20 rDS(on) (W) ID (A) 0.125 @ VGS = 4.5 V 2.4 0.200 @ VGS = 2.5 V 1.8 0.200 @ VGS = –4.5 V –1.8 0.340 @ VGS = –2.5 V –1.2 D1

Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

ONET4291PARGVR

Abstract: ONET4291PA SDD11
Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

Contextual Info: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold

Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM74LS534 Octal D-Type Flip-Flop With General Description The ’LS534 is a high speed, low pow er octal D -type flip-flop featuring separate D -type inputs for each flip-flop and 3-STATE outputs for bus oriented applications. A buffered

74LS395N

Contextual Info: I R C H I L D S E M IC O N D U C T O R T M DM74LS395 4-Bit Shift Register with 3-STATE Outputs General Description Features The LS395 is a 4-bit shift register with 3-STATE outputs and can operate in either a synchronous parallel load o r a serial sh ift-right m ode, as determ ined by th e S e lect input. An asyn­

Contextual Info: R C H II_ D •M ICO N DUCTO R r DM74LS299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins General Description Features The ’LS299 is an 8-bit universal shift/storage register with 3-STATE outputs. Four modes of operation are possible:

74LS136N

Abstract: 74ls136m DM74LS1
Contextual Info: S E M IC O N D U C T O R tm DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description This device contains fo u r independent gates, each of which perform s the logic exclusive-O R function. Connection Diagram D ual-ln-Line Package

Contextual Info: Revised January 1999 EMICQNDUCTGR tm 74ACT818 8-Bit Diagnostic Register General Description Features The AC T818 is a high-speed, general-purpose pipeline register with an on-board diagnostic register for perform ing serial diagnostics a nd /or w ritable control store loading.