RESET AND SET FLIP FLOP IC Search Results

Contextual Info: June 1997 Dual J-K Flip-Flop with Set and Reset File Number 3773 Functional Diagram The CD54HC109F3A and CD54HCT109F3A are dual J-K flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock 1CP and 2CP . The flip-flop is set and reset by active-low S and R,

SCHMITT-TRIGGER application

Abstract: 74LVC74A
Contextual Info: INTEGRATED CIRCUITS 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC24 Data Handbook Philips Semiconductors 1998 Jun 17 Philips Semiconductors Product Specification Dual D-type flip-flop with set and reset;

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD U74HC74 CMOS IC DUAL D FLIP-FLOP WITH SET AND RESET,POSITIVE-EDGEN TRIGGER „ DESCRIPTION The U74HC74 contains dual D flip-flops and each flip-flop has independent DATA, SET , RESET and clock inputs and complementary outputs Q and Q . A low level at appropriate

Contextual Info: ASSESS? CD74HC109, CD74HCT109 Dual J - K Flip-Flop with S e t and Reset Positive-Edge Trigger March 1998 Features Description • Asynchronous Set and Reset The Harris CD74HC109 and CD74HCT109 are dual J-K flipflops with set and reset. The flip-flop changes state with the

smd transistor 2Q

Abstract: MNA423 74ALVC74 74ALVC74D 74ALVC74PW TSSOP14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2002 Nov 15 2003 Jan 24 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;

MDB105

Abstract: sot762 footprint MNA423 74ALVC74 74ALVC74BQ 74ALVC74D 74ALVC74PW DHVQFN14 TSSOP14 2SD92
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2003 Jan 24 2003 May 26 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;

74ls112 pin configuration

Abstract: 74ls112 function table 74LS112 74S112
Contextual Info: Signetics 74LS112, S112 Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '112 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Clock, Set and Reset inputs. The Set So and Reset (R q) inputs, when LOW,

MNA423

Abstract: MDB105 smd transistor 2Q 74LVC74A 74LVC74ABQ 74LVC74AD 74LVC74ADB 74LVC74APW SSOP14 TSSOP14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2002 Jun 18 2003 May 26 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;

74HC

Contextual Info: Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger 74HC/HCT109 SD and reset (RD) inputs; also complementary Q and Q outputs. FEATURES • J, K inputs for easy D-type flip-flop The set and reset are asynchronous active LOW inputs

TEXTOOL zif 40 pin socket

Abstract: MS-012-AB 74ALS 74ALS109A 74ALS109AD 74ALS109AN SOL-24
Contextual Info: 74ALS109A Signetics FLIP-FLOP 74ALS109A Dual J-K Positive Edge-Triggered Flip-Flops With Set and Reset ALS Products Product Specification DESCRIPTION TYPE The 'ALS109A is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, Clock, Set and Reset inputs; also true and complemen­

1u9a

Contextual Info: Philips Semiconductors Product specification Dual J-K positive edge triggered flip-flop with set and reset DESCRIPTION PIN CONFIGURATION The 74ALS109A is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and

74HC74

Abstract: 74HC74 application note 74HCT74 74HCT74 DATASHEET 74HC74 datasheet 74HC74N Current 74HCT74 74hc74 pin diagram 74HC74 application TTL 74hc74
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Feb 23 2003 Jul 10 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;

74LVC109

Abstract: 74LVC109A 74LVC109D 74LVC109DB 74LVC109PW SSOP16 TSSOP16 MNA860
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Apr 28 2004 Mar 18 Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger

MNA423

Abstract: 74LVC74A 74LVC74AD 74LVC74ADB 74LVC74APW
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Jun 17 2002 Jun 18 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge

Contextual Info: AVG Semiconductors DDiT Technical Data DV74HCT112 Available Q2, 1995 DV74HC112 DV74HCT112 Dual J-K Flip-Flop with Set and Reset This device identical in pinout to the LS112. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.

MC100LVEL31

Contextual Info: MC100LVEL31 3.3V ECL D Flip-Flop with Set and Reset Description The MC100LVEL31 is a D flip-flop with set and reset. The device is functionally equivalent to the EL31 device but operates from a 3.3 V supply. With propagation delays and output transition times essentially

Contextual Info: MC10E431, MC100E431 5V ECL 3-Bit Differential Flip-Flop The MC10E/100E431 is a 3-bit flip-flop with differential clock, data input and data output. The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the

IDT74LVC109A

Abstract: LVC109A
Contextual Info: IDT74LVC109A 3.3V CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET, POSITIVE-EDGE TRIGGER, AND 5 VOLT TOLERANT I/O FEATURES: – – DESCRIPTION: 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015;

IDT74LVC109A

Abstract: LVC109A dual jk flipflop
Contextual Info: IDT74LVC109A 3.3V CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET, POSITIVE-EDGE TRIGGER, AND 5 VOLT TOLERANT I/O FEATURES: – – DESCRIPTION: 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015;

HEL31

Abstract: KEL31 MC10EL31MNR4 AN1504 E131 MC100EL31 MC10EL31
Contextual Info: MC10EL31, MC100EL31 5 V ECL D Flip-Flop With Set and Reset The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally

MC10E431

Abstract: E431 MC100E431
Contextual Info: MC10E431, MC100E431 5V ECL 3-Bit Differential Flip-Flop Description The MC10E/100E431 is a 3-bit flip-flop with differential clock, data input and data output. The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the

KEL31

Abstract: hel31 HEL31 SOIC8
Contextual Info: MC10EL31, MC100EL31 5 V ECL D Flip-Flop With Set and Reset The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally

cdfp4-f16

Abstract: smd transistor 2Q transistor 2Cp smd 5962F9863201V9A 5962F9863201VCC 5962F9863201VXC ACS109HMSR-03 ACS109MS ACS109D
Contextual Info: ACS109MS Data Sheet Radiation Hardened Dual J-K Flip-Flop with Set and Reset The Radiation Hardened ACS109MS is a Dual J-K FlipFlop with Set and Reset. These Flip-Flops have independent J, K, Set, Reset, and Clock inputs and Q and Q outputs. The outputs change state on the positive-going

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UTC4013 Preliminary CMOS IC DAUL D-TYPE FLIP-FLOP „ DESCRIPTION The UTC4013 is a dual D-type flip-flop which has two independent circuits and each flip-flop features independent data, set, reset, and clock inputs and outputs. The input level