RAS D3 Search Results

RD2 TP10

Abstract: L6244 J311 PDI 40 JS29 EPM7032 JS37 4.7k j33 TXD RXD R105
Contextual Info: A B C DData[31:0] DData[31:0] DAddr[8:0] DAddr[8:0] DAddr[8:0] RAS~[1:0] WE~ CAS~ ChipSel~ RAS~[1:0] WE~ CAS~ ChipSel~ RAS~[1:0] WE~ CAS~ ChipSel~ DData[31:0] 4 Int~ Req~ Serr~ IdSel DevSel~ Stop~ Par Perr~ Frame~ IRdy~ TRdy~ Gnt~ PCI CBE~[3:0] PRst~ PciClk

SYD23244

Abstract: D6 48 61D13 63D14 D2147
Contextual Info: • 72 Pin Singie in-iine Memory Module. • 5 Volt Supply ± 5%. • 2048 Refresh Cycles. • Fast Page Mode Capability. • Three Refresh Modes: CAS before RAS, RAS only and Hidden Refresh. • Extreme temperature and voltage testing to ensure high reliability.

cat c15 ecm

Abstract: 1Kx32 asus f3 ARRAY MICROSYSTEMS asus n10 a66210 D110 d4oc1 asus n5
Contextual Info: a66311 RECONFIGURABLE a r r a y S T O R E R a S ADVANCE DATA SHEET- REVISION 1.1, MAR, 1992 GENERAL DESCRIPTION: FEATURES: The Reconfigurable array Store (RaS) is an application specific memory chip for the a66xxx family of array pro­ cessing devices. The RaS can be used to implement data

Contextual Info: ADVANCED 16M 2-Bank x 524,288-Word x 16-Bit Synchronous DRAM F EATURES • • • • • • • • • OPTIONS GENERAL DESCRIPTION APR. 2007 (Rev.2.9) F D Read (READ) [RAS = H, CAS = L, WE = H] Write (WRITE) [RAS = H, CAS =WE = L] CLK CS Chip Select: L=select, h=deselect

dm9161aep

Abstract: PQFP208 footprint PB25D AT91SAM9XE XOUT32 PB20 AT73C213 PB18 PC11 PC13
Contextual Info: 5VDC POW ERLED DAC D PA9 DOUT DIN CLK CS NRST 2 D[0.31] A[0.22] D[0.31] A[0.14] SHDN PC1 PB18 PB17 PB16 PCK0 TD0 TF0 TK0 PB0 PB1 PB2 PB3 SPI1_MISO SPI1_MOSI SPI1_SPCK SPI1_NPCS0 NRST RAS CAS SDA10 SDWE SDCS_NCS1 RAS CAS SDA10 SDW E SDCS_NCS1 SDCK SDCKE

Contextual Info: molate 1 M e g x 4 M o n o tìth ìc D R A M MDM41000-80/ 10/12 Issue 3.0: September 1992 1,048,576 x 4 CMOS High Speed Dynamic RAM Features Row Access Time of 80,100,120 ns 5 Volt Supply ±10% 1024 Refresh Cycles 16 ms CAS before RAS Refresh RAS only Refresh

Siemens Multibank DRAM

Abstract: 256X32 32MDRAM
Contextual Info: SIEMENS MULTIBANK DRAMS MDRAMS HYB 39M93200 288k x 32 MDRAM HYB 39M83200 256k x 32 MDRAM Advanced Information * Ultra-High Performance 666 MByte/sec single device transfer rate 36 ns RAS access 12 ns CAS access 6 ns burst cycle * Multibank Architecture RAS and precharge may overlap CAS READ or WRITE to different banks effectively hiding

dm9161aep

Abstract: MN2102 R1100D101C WM8731 AT91SAM9G20-CU DM9161A 8d20 MT29F2G08AACWP RR83 PB18
Contextual Info: POWERLED 5VDC DAC D PA[0.31] SHEET 2 POWER SUPPLY PA9 5 D[0.31] A[0.22] PIO DIN CLK CS 2 MEMORY D[0.31] A[0.22] PC1 PB18 PB17 PB16 PCK0 TD0 TF0 TK0 PB1 PB2 PB3 SPI1_MOSI SPI1_SPCK SPI1_NPCS0 A[0.14] RAS CAS SDA10 SDWE SDCS_NCS1 RAS CAS SDA10 SDWE SDCS_NCS1

PQFP208 footprint

Abstract: N1S4 dm9161aep RR83 PB20 BMS C125 AT91SAM9260 PB18 PC11 PC13
Contextual Info: 6 PA[0.31] POWER SUPPLY 5VDC POWERLED DAC D PA9 5 DOUT DIN CLK CS NRST 2 PIO D[0.31] A[0.22] D[0.31] A[0.14] SHDN PC1 PB18 PB17 PB16 PCK0 TD0 TF0 TK0 PB0 PB1 PB2 PB3 SPI1_MISO SPI1_MOSI SPI1_SPCK SPI1_NPCS0 NRST RAS CAS SDA10 SDWE SDCS_NCS1 RAS CAS SDA10

OJ36

Abstract: EPM7032 ARXD 149 u18n JS29 74FCT163244 MAX708 R119 EDATA-10 2A1823
Contextual Info: A B C D E SRAMs TestPoints RAS*[3:0] OCAS*[3:0] ECAS*[3:0] RAS*[3:0] OCAS*[3:0] ECAS*[3:0] AD[31:0] DAdr[11:0] OData[31:0] EData[31:0] BAdrO[2:0] OWr*[3:0] dev_adr[21:0] BAdrE[2:0] EWr*[3:0] DevRD1* SramCS* OSramCS* BAdrO[2:0] AD[31:0] DAdr[11:0] BAdrE[2:0]

74FCT163244

Abstract: JS301 74FCT162244 JS29 MAX708 R102 R119 7032RST PCI SIZE ARXD 149
Contextual Info: A B C D E SRAMs TestPoints RAS*[3:0] OCAS*[3:0] ECAS*[3:0] RAS*[3:0] OCAS*[3:0] ECAS*[3:0] AD[31:0] DAdr[11:0] OData[31:0] EData[31:0] BAdrO[2:0] OWr*[3:0] dev_adr[21:0] BAdrE[2:0] EWr*[3:0] DevRD1* SramCS* OSramCS* BAdrO[2:0] AD[31:0] DAdr[11:0] BAdrE[2:0]

d1564

Abstract: 72 simm function topless SIMM232S 63D15 30 pin simm memory
Contextual Info: SIMM232S_ TOPLESS 2Mx32 DRAM SIMM Low Power Memory Module FEATURES -Memory capacity 8MB, organised as 2M bits x 32. -Power supply voltage 5.0V+/- 5%,5.0V+/- 10% -TTL compatible inputs and outputs. -Fast Page Mode operation. -/RAS-only-Refresh.

Contextual Info: IBM11M32730B IBM11M32730C 32M x 72 DRAM MODULE Features • 32Mx72 Dual Bank Fast Page Mode DIMM System Performance Benefits: -Buffered inputs (except RAS, Data) -Reduced noise (32 Vss/Vcc Pir|s) -4 Byte Interleave enabled -Buffered PDs • Performance:

Contextual Info: IBM11M32730B32M x 72 E12/12, 3.3V, AuMMDL18DSU-001041626. IBM11M32730C32M x 72 E13/11, 3.3V, AuMMDL18DSU-001041626. IBM11M32730B IBM11M32730C 32M x 72 DRAM Module Features • System Performance Benefits: -Buffered inputs except RAS, Data -Reduced noise (32 VSS/VCC pins)

Contextual Info: IBM11N16735B IBM11N16645B IBM11N16735C IBM11N16645C 16M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 16Mx64.16Mx72 Extended Data Out Page Mode DÎMMs • Performance: -60 Wc [RAS Access Time tCAC

Contextual Info: 050-123 Copper to Fiber Single Channel Ethernet Media Converter 10/100/1000BASE-T to Single Fiber 1310/1550 Bidirectional Optical Ethernet 28VDC M38999 Signal , M38999 (Power), M38999 (Fiber Optic) REV DESCRIPTION DATE APPROVED 1 Preliminary 3/27/2015 RAS/MF

Contextual Info: IBM11M32735BBC 32M x 72 Stacked DRAM Module Features • 168-Pin JEDEC-Standard 8-Byte Dual In-Line Memory Module • System Performance Benefits: - Buffered inputs except RAS, Data - Reduced noise (32 VSs/V cc P^s) - 4 Byte Interleave enabled - Buffered PDs

HD63484P8

Contextual Info: H D63484-Advanced CRT Controller ACRTC The advanced CRT controller (ACRTC) CMOS VLSI m icrocom puter peripheral device can display both graphics and characters on ras­ ter-scan displays. It is a new generation CRT controller based on bitm apped technology. It

Contextual Info: IBM11M32735B IBM11M32735C 32M x 72 DRAM Module Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • System Performance Benefits: - Buffered inputs except RAS, Data - Reduced noise (32 VSs/V cc P^s) - 4 Byte Interleave enabled - Buffered PDs

Contextual Info: IBM11M8735H 8M X 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for ECC applications • System Performance Benefits: • 8Mx72 Extended Data Out Mode DIMM -Buffered inputs except RAS, Data • Performance:

f87j

Abstract: 43CAS 1x32 IX328 1x39
Contextual Info: IBM11N16735B IBM11N16645B IBM11N16735C IBM11N16645C 16M x 64/72 DRAM Module Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 16Mx64, 16Mx72 Extended Data Out Page Mode DIMMs |.-50.|.-60.| t:;Ac i RAS Access Tim e

Contextual Info: IBM11M2730H 2M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module Optimized for ECC applications System Performance Benefits: • 2Mx72 Fast Page Mode DIMM - Buffered inputs except RAS, Data - Reduced noise (32 Vss/Vcc Pins)

Contextual Info: IBM11M32735B IBM11M32735C 32M x 72 DRAM Module Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • System Performance Benefits: - Buffered inputs except RAS, Data - Reduced noise (32 VSs/V cc P^s) - 4 Byte Interleave enabled - Buffered PDs

Contextual Info: IBM11M1640L 1M X 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for byte-write non-parity applications • System Performance Benefits: -Buffered inputs except RAS, Data -Reduced noise (32 VSsA /cc P^s)