RANGE12 Search Results

AIN97

Abstract: MAX11329
Contextual Info: EVALUATION KIT AVAILABLE MAX11329–MAX11332 3Msps, 12-/10-Bit, 8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access General Description Benefits and Features The MAX11329–MAX11332 are 12-/10-bit with external reference and 500kHz, full-linear-bandwidth, high-speed,

STP5111

Contextual Info: S un M ic r o e l e c t r o n ic s July 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

CY78991

Abstract: CY7B991 CY7B9911 CY7B9911V CY7B9911V-5JC
Contextual Info: CY7B9911V 3.3V RoboClock+ m CYPRESS High Speed Low Voltage Programmable Skew Clock Buffer PRELIMINARY Features • All output pair skew <100 ps typical 250 max. • 3 .7 5 -to 110-MHz output operation • User-selectable output functions — Selectable skew to 18 ns

MAX11337

Contextual Info: EVALUATION KIT AVAILABLE MAX11335–MAX11340 500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access General Description Benefits and Features The MAX11335–MAX11340 are 12-/10-bit with external reference and 500kHz, full-linear-bandwidth, high-speed,

Contextual Info: EVALUATION KIT AVAILABLE MAX11120–MAX11128 1Msps, Low-Power, Serial 12-/10-/8-Bit, 4-/8-/16-Channel ADCs General Description The MAX11120–MAX11128 are 12-/10-/8-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive-approximation register SAR analog-to-digital

004472

Abstract: A10C A14C CY7C1399V
Contextual Info: p y n I 1 j r C Y 7 C 1 3 9 9 V n I? Q c i l l l D D 32K x 8 3.0V Static RAM Features pansion is provided by an active LO W chip enable CE and active LO W ou tput enable (OE) and three -state drivers. The device has an au tom atic pow e r-d ow n feature, reducing the

MX 0541

Abstract: mx 0541 b CY7C373
Contextual Info: fax id: 6138 CY7C373Ì CYPRESS UltraLogic 64-Macrocell Flash CPLD Functional Description Features • 64 m a cro cells in fo u r logic blocks The C Y 7 C 3 73i is an In-System R eprogram m able C om plex P rogram m able Logic Device CPLD and is pa rt of the

CY7C185A-20LMB

Abstract: 7c186a CY7C186A-20DMB C105a CY7C185A CY7C186A-45DMB Y7C185 ZF78 CY7C185A-45LMB
Contextual Info: CYPRESS S E MI CONDUCTOR m 4GE D 250=1^2 DGOSGQÖ 7 H I C Y P 7-V£-23-/Z CY7C185A CY7C186A C Y PR FSS SEMICONDUCTOR F unctional D escrip tion Features Automatic power-down when deselected CMOS for optimum speed/power High speed - 20 ns Low active power -

SDHC specification

Abstract: omnivision SS42 graphic display 8080 epson sony IMX 136 toshiba LTM 10 C 015 K NV 15F sony smartphone ARM11 MCIMX31
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data MCIMX31 and MCIMX31L MCIMX31 and MCIMX31L Multimedia Applications Processors 1 Introduction The MCIMX31 and MCIMX31L multimedia applications processors represent the next step in low-power, high-performance application processors.

VKA50LS03

Abstract: VKA50LS05 VKA50LS12 VKA50LS15 VKA50LS24 VKA50MS03 VKA50MS05 VKA50MS12 VKA50MS15
Contextual Info: Product Data Sheet 50 WATT SINGLE OUTPUT HIGH DENSITY DC/DC CONVERTER VKA50xS Series FEATURES DESCRIPTION ● 18 - 36V & 33 - 75V INPUT RANGE ● SMALL SIZE: 2.28" X 2.4" X 0.50" ● HIGH EFFICIENCY: 87% TYPICAL AT 5V ● 100µ µS TRANSIENT RESPONSE 50-100% LOAD STEP

Contextual Info: B U R R -B R O W N r s B DDC101 i HI n L 'A t 20-BIT ANALOG-TO-DIGITAL CONVERTER FEATURES APPLICATIONS • MONOLITHIC CH AR G E INPUT ADC • DIRECT PHOTOSENSOR DIGITIZATION • DIGITAL FILTER NOISE REDUCTION: 1.6ppm, rms • PRECISION INSTRUMENTATION • DIGITAL ERROR CORRECTION: CDS

Contextual Info: fax id: 3550 CY7B991V 3.3V RoboClock PRELIMINARY Low Voltage Programmable Skew Clock Buffer Features • All output pair skew <100 ps typical 250 max. • 3.75- to 80-M Hz output operation • User-selectable output functions — Selectable skew to 18 ns

Contextual Info: PRELIMINARY C Y 7C 374i UltraLogic 128-Macrocell Flash CPLD Features • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface • Bus Hold capabilities on all l/Os and dedicated inputs

Contextual Info: CY7C106 ADVANCED INFORMATION CYPRESS SEMICONDUCTOR 262,144 x 4 Static R /W RAM Features Functional Description • High speed - U à = 25 ns T he CY7C106 is a high-performance CMOS static RAM organized as 262,144 words by 4 bits. Easy memory expansion is provided by an active LOW chip enable

Contextual Info: CY7B9911V 3.3V RoboClock+ CYPRESS High-Speed Low-Voltage Programmable Skew Clock Buffer P R E L IM IN A R Y * LV-PSCB Features • All output pair skew <100 ps typical (250 max.) • 3 .7 5 -to 110-MHz output operation • User-selectable output functions

Contextual Info: 19-6026; Rev 3; 4/12 EVALUATION KIT AVAILABLE MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, 8-/16-Channel ADCs General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive

Contextual Info: 19-6148; Rev 1; 4/12 EVALUATION KIT AVAILABLE MAX11120–MAX11128 1Msps, Low-Power, Serial 12-/10-/8-Bit, 4-/8-/16-Channel ADCs General Description The MAX11120–MAX11128 are 12-/10-/8-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive-approximation register SAR analog-to-digital

MAX11131

Contextual Info: 19-6026; Rev 1; 11/11 EVALUATION KIT AVAILABLE MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, 8-/16-Channel ADCs General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive approximation SAR analog-to-digital converters (ADCs). The MAX11129–MAX11132 include both

Contextual Info: 19-6026; Rev 2; 2/12 EVALUATION KIT AVAILABLE MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, 8-/16-Channel ADCs General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear bandwidth, high speed, low-power, serial output successive

S4436

Abstract: 26T25 D 1556
Contextual Info: a 24-Bit ⌺-⌬ ADC AD1555/AD1556 PRELIMINARY TECHNICAL DATA FEATURES: GENERAL DESCRIPTION The AD1555 is a complete sigma-delta modulator, combined with a programmable gain amplifier intended for low frequency, high dynamic range measurement applications. The

CY37032V

Contextual Info: CY37032V PREUM INAm UltraLogic 32-Macrocell ISR™ CPLD — tPD = 8.5 ns Features — ts = 5.0 ns • 32 macrocells in two logic blocks • 3.3V In-System Reprogrammable™ ISR™ includes: — tco = 6.0 ns Product-term clocking IEEE 1149.1 JTAG boundary scan

T1119

Contextual Info: ^^W ^C Y P R K S S Ultra37256V preliminary UltraLogic 3.3V 256-Macrocell ISR™ CPLD Features — t PD = 12 ns — ts = 7 ns • 256 m a cro c ells in sixteen log ic blocks — t co = 6.5 ns • 3.3 V In -S ystem R ep ro g ram m ab le™ IS R ™ • P ro d uct-term clo ckin g

CYM1465LPD-100C

Contextual Info: CYM1465 512K x 8 SRAM Module Features Functional Description The CYM1465 is a high-performance 4-megabit static RAM module organized as 512K words by 8 bits. This module is constructed using four 128K x 8 RAMs mounted on a substrate with pins. A decoder is used to interpret the higher-order ad­

Contextual Info: /T T SCS-THOMSON EifllW[ilL[l ir[M R!lD g§ ST62T35B/E35B 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART • 3.0 to 6.0V Supply Operating Range ■ 8 MHz Maximum Clock Frequency ■ -40 to +125°C Operating Temperature Range