Q11A Search Results

ics TSSOP-64

Contextual Info: ICSSSTVF16859 Integrated Circuit Systems, Inc. Advance Information DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features:

Contextual Info: ICSSSTVA16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

NO336

Abstract: ics TSSOP-64
Contextual Info: ICSSSTVF16859B Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

Q13A

Abstract: Q11A ICS93V857 ICS95V857 ICSSSTV16859 MLF2
Contextual Info: ICSSSTV16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Recommended Applications: • DDR Memory Modules • Provides complete DDR DIMM logic solution with ICS93V857 or ICS95V857 • SSTL_2 compatible data registers Q13A Q12A Q11A

DDR333

Abstract: ICS93V857 ICS95V857 PC2100 PC2700 PC3200 Q13A
Contextual Info: ICSSSTVA16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

DDR333

Abstract: ICS93V857 ICS95V857 ICSSSTVF16859 PC2100 PC2700 PC3200 Q13A VFQFN
Contextual Info: ICSSSTVF16859 Integrated Circuit Systems, Inc. Advance Information DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features:

Contextual Info: ICSSSTVF16859B Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

DDR333

Abstract: ICS93V857 ICS95V857 ICSSSTVA16859B PC2100 PC2700 PC3200 Q13A SSTVN16859 dimm ddr pc3200
Contextual Info: ICSSSTVA16859B Integrated Circuit Systems, Inc. DATA SHEET ICSSSTVA16859B DDR 13-Bit to 26-Bit Registered Buffer DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B

DDR333

Abstract: ICS93V857 ICS95V857 ICSSSTVA16859B PC2100 PC2700 PC3200 Q13A SSTVN16859
Contextual Info: ICSSSTVA16859B Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

ics TSSOP-64

Abstract: VFQFN 64
Contextual Info: ICSSSTV16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Recommended Applications: • DDR Memory Modules • Provides complete DDR DIMM logic solution with ICS93V857 or ICS95V857 • SSTL_2 compatible data registers Q13A Q12A Q11A

Contextual Info: ICSSSTV16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Recommended Applications: • DDR Memory Modules • Provides complete DDR DIMM logic solution with ICS93V857 or ICS95V857 • SSTL_2 compatible data registers Q13A Q12A Q11A

Contextual Info: ICSSSTVA16859 Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

DDR333

Abstract: ICS93V857 ICS95V857 PC2100 PC2700 PC3200 Q13A
Contextual Info: ICSSSTVF16859A Integrated Circuit Systems, Inc. DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features: • Differential clock signals

DDR333

Abstract: ICS93V857 ICS95V857 ICSSSTVF16859 PC2100 PC2700 PC3200 Q13A
Contextual Info: ICSSSTVF16859 Integrated Circuit Systems, Inc. Advance Information DDR 13-Bit to 26-Bit Registered Buffer Q13A Q12A Q11A Q10A Q9A VDDQ GND Q8A Q7A Q6A Q5A Q4A Q3A Q2A GND Q1A Q13B VDDQ Q12B Q11B Q10B Q9B Q8B Q7B Q6B GND VDDQ Q5B Q4B Q3B Q2B Q1B Product Features:

jfet j102

Abstract: SLUA372 tda 0470 bq78PL118EVM SLUA524 SLUU481 smd zener diode code z4 USB-TO-GPIO cell balance board users guide Advanced Gas Gauge Host Firmware Guide
Contextual Info: User's Guide SLUU474 – January 2011 bq78PL116EVM Evaluation Module The bq78PL116EVM Evaluation Module can assist users in evaluating the bq78PL116 PowerLAN Master Gateway Controller. Included in this document are discussions of the board and its operation, the

PS8743

Abstract: SSTU32864A PI74SSTU32864A Q11A Q13A
Contextual Info: PI74SSTU32864A 25-Bit 1:1 or 14-Bit 1:2 Configurable Registered Buffer Features Description • PI74SSTU32864A is designed for low-voltage operation, VDD = 1.8V • Supports Low Power Standby Operation • Enhanced Signal Integrity for 1 and 2 Rank Modules

HA7-2520-2

Abstract: HA2525 HA-2525 HA2-2520-2 HA2-2522-2 HA2-2525-5 HA-2520 HA-2522 ha-2525-5
Contextual Info: HA-2520, HA-2522, HA-2525 Data Sheet February 16, 2009 20MHz, High Slew Rate, Uncompensated, High Input Impedance, Operational Amplifiers Features • High Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . 120V/µs • Fast Settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200ns

MC3373P

Abstract: MC3373 upC1373 MC1449 MRD821 IR decoder SO8 CANS-4612Z IR 5M receiver IR REMOTE CONTROL IC LITRONIX
Contextual Info: Order this document by MC3373/D MC3373 Remote Control Amplifier/Detector REMOTE CONTROL WIDEBAND AMPLIFIER WITH DETECTOR The MC3373 is intended for application in infrared remote controls. It provides the high gain and pulse shaping needed to couple the signal from

DDR2-667

Abstract: SSTUA32864 SSTUA32866 SSTUA32S865 TFBGA160
Contextual Info: SSTUA32S865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 16 March 2007 Product data sheet 1. General description The SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory

SSTUA32864

Abstract: SSTUA32866
Contextual Info: SSTUG32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications Rev. 01 — 23 April 2007 Product data sheet 1. General description The SSTUG32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

DDR2-800

Abstract: SSTUA32864 SSTUA32866 E6G3
Contextual Info: SSTUM32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 02 — 2 March 2007 Product data sheet 1. General description The SSTUM32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

64KX32

Abstract: 7C1334-100 7C1334-133 7C1334-50 7C1334-80 CY7C1334
Contextual Info: fax id: 1084 CY7C1334 PRELIMINARY 64Kx32 Pipelined SRAM with NoBL Architecture Features • Low 16.5 mW standby power Functional Description • Pin compatible and functionally equivalent to ZBT™ device MT55L64L32P • Supports 133-MHz bus operations with zero wait states

7C1351-40

Abstract: 7C1351-50 7C1351-66 CY7C1351 IDT71V547 MCM63Z737
Contextual Info: fax id: 1102 CY7C1351 PRELIMINARY 128Kx36 Flow-Through SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT devices IDT71V547, MT55L128L36F and MCM63Z737 • Supports 66-MHz bus operations with zero wait states

A115-A

Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER TOP-SIDE MARKING H2 SU864D
Contextual Info: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout