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    Infineon Technologies AG

    Infineon Technologies AG DDB6U50N22W1RPB11BPSA1

    Module: IGBT; Urmax: 2.2kV; Trench
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    TME DDB6U50N22W1RPB11BPSA1 30
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    Avnet Americas DDB6U50N22W1RPB11BPSA1 Tray 30 19 Weeks 1
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    Infineon Technologies AG F3L8MR12W2M1HPB11BPSA1

    Module: IGBT
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    TME F3L8MR12W2M1HPB11BPSA1 18
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    Newark F3L8MR12W2M1HPB11BPSA1 Bulk 40 1
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    Rochester Electronics F3L8MR12W2M1HPB11BPSA1 16 1
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    EBV Elektronik F3L8MR12W2M1HPB11BPSA1 90 27 Weeks 18
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    Infineon Technologies AG FF225R17ME4PB11BPSA1

    Module: IGBT; NTC thermistor; Field Stop,Trench
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    TME FF225R17ME4PB11BPSA1 6
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    Rochester Electronics FF225R17ME4PB11BPSA1 618 1
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    Vyrian FF225R17ME4PB11BPSA1 7,746
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    Infineon Technologies AG FP50R12N2T7PB11BPSA1

    Module: IGBT; NTC thermistor; Ic: 50A; AG-ECONO2B; Inverter
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    TME FP50R12N2T7PB11BPSA1 10
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    Newark FP50R12N2T7PB11BPSA1 Bulk 19 1
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    Infineon Technologies AG FS75R17W2E4PB11BPSA1

    Module: IGBT; NTC thermistor; Inverter; Field Stop,Trench
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    TME FS75R17W2E4PB11BPSA1 18
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    EBV Elektronik FS75R17W2E4PB11BPSA1 19 Weeks 18
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    PB11B Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    00XXX001

    Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
    Contextual Info: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic


    Original
    or3t20or3t301a-06or3t80+800xxx001ba 5979r15c3or3t125or3t55pt10pt11pt12 PDF

    MachXO sysIO Usage Guide

    Abstract: LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25
    Contextual Info: MachXO Family Data Sheet Version 02.3_4W February 2007 MachXO Family Data Sheet Introduction April 2006 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    tn1086tn1087tn1097machxo sysio usage guide+9lcmxo256c-4m100clcmxo2280lcmxo640c-3tn100ilcmxo640c-3ft256clcmxo1200lcmxo256lcmxo2280e-4m132ilvcmos15lvcmos25 PDF

    OR3LP26B

    Abstract: OR3T20 ORT8850 7ba2 diode pb7d
    Contextual Info: Preliminary Data Sheet April 2001 PayloadPlus /APC UTOPIA Slave Bridge Introduction Features The PayloadPlus/ATM port controller APC universal test and operations PHY interface for ATM (UTOPIA) slave bridge, also known as the PayloadPlus APC wedge (PAW) or the Atlanta™ interface


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    or3t20ds01-212ncipor3lp26bort8850+27ba2diode pb7d PDF

    TPE11

    Abstract: TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25
    Contextual Info: LatticeEC Standard Evaluation Board – Revision B User’s Guide April 2007 ebug10_01.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision B User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original
    ebug10120-pin32-bitpvg5h503a01+10tpe11tpt20con6av2 tpr4pr48bpt13bcondor e5condorlvcmos15lvcmos25 PDF

    OSC4/SM

    Abstract: MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5
    Contextual Info: LatticeXP2 Advanced Evaluation Board User’s Guide January 2009 Revision: EB30_01.3 LatticeXP2 Advanced Evaluation Board User’s Guide Lattice Semiconductor Introduction The LatticeXP2 Advanced Evaluation Board provides a convenient platform to evaluate, test and debug user


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    latticexp2-1724-6r8osc4/smmdls-20265+8optrex c-51505mdls-24265short stop 12v p18 30ars232 converter dmxmosfet j49lcm-s01602lcm-s02402vishay sot23 marking f5 PDF

    CON6A

    Abstract: K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48
    Contextual Info: LatticeEC Standard Evaluation Board – Revision A User’s Guide April 2007 EB07_02.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision A User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original
    120-pin32-bitpvg5h503a01con6a+9k4t51163qg-hce60pds4102-dl2lvcmos33lvcmos15lvcmos25pb50btpe11pl43afpga48 PDF

    LC4064ZE

    Abstract: BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork
    Contextual Info: LatticeXP Family Handbook HB1001 Version 03.4, September 2010 LatticeXP Family Handbook Table of Contents September 2010 Section I. LatticeXP Family Data Sheet Introduction Features . 1-1


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    hb1001tn1050tn1049tn1082+11tn1074lc4064zebsdl files infineonlfxp6c-3fn256ix-ray machinek4h560838elc4064lc4256zelfxp10c-3f256ilfxp3c-3tn144cpci x1 express pcb dimensions artwork PDF

    30021

    Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
    Contextual Info: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and


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    orso42g5orso82g5orso42g5-1bmn484iorso82g5-2fn680i+830021l48cl41cic l44c datasheetl30cl31cl43cort42g5 PDF

    h22 8-pin

    Abstract: J68 10A PL-20A DC3BE J119 J1266 1J44 PL34A JITo-2-dc3 J127
    Contextual Info: ORLI10G ver. 1.5 1 01/29/03 Lattice Semiconductor Corp SECTION PAGE LAYOUT OF ORLI10G BOARD: 3 CONNECTORS AND JUMPERS J1 TO J127: 4 CONNECTORS CON1 TO CON5: 18 ADJUSTABLE RESISTORS: 22 ORLI10G ver. 1.5 2 01/29/03 Lattice Semiconductor Corp Layout of ORLI10G board:


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    orli10gh22 8-pinj68 10apl-20a+7dc3bej119j12661j44pl34ajito-2-dc3j127 PDF

    syscon

    Abstract: LFEC1E-3T100C ips works 6CW3
    Contextual Info: LatticeECP/EC Family Data Sheet Version 01.3 LatticeECP/EC Family Data Sheet Introduction November 2004 Preliminary Data Sheet Features − − − − − − • Extensive Density and Package Options • 1.5K to 41K LUT4s • 65 to 576 I/Os • Density migration supported


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    36x3618x18ddr400200mhz+7tn1052tn1057tn1053sysconlfec1e-3t100cips works6cw3 PDF

    Contextual Info: LatticeXP Family Data Sheet Version 04.4, April 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original
    hstl15tn1050tn1052tn1082 PDF

    Contextual Info: LatticeXP Family Data Sheet Version 03.0, September 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    hstl15tn1050tn1052tn1082 PDF

    Contextual Info: ORCA ORLI10G Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC August 2004 Data Sheet Introduction The Lattice ORCA Series 4-based ORLI10G FPSC combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORLI10G consists


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    orli10g10gbps125gbpsoif-sfi4-01+216-bitorli10g-2bmn680i PDF

    pt45

    Contextual Info: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    ds1004700mhz600mbps125gbps+5110mwvcc12lfsc25900-ballpt45 PDF

    Contextual Info: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns)


    OCR Scan
    att2c04att2c06att2c08att2c10+6att2c12att2c15att2c26att2c40ds95-183fpgads95-031 PDF

    IC TTL 7495 diagram and truth table

    Abstract: BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc
    Contextual Info: Data Sheet June 1999 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


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    ds99-087fpgads98-163fpga-01ic ttl 7495 diagram and truth tableba 5979 s+8am 5766ba 5979motorola s240pin diagram of ic 7495xilinx countertransistor on 4409pr25dinverter design using plc PDF

    PT35c transistor

    Abstract: pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic
    Contextual Info: Data Addendum March 2002 ORCA OR3LxxxB Series Field-Programmable Gate Arrays Introduction This data addendum refers to the information found in the ORCA® Series 3C and 3T Field-Programmable Gate Arrays Data Sheet. • ■ Features ■ ■ ■ ■ ■ ■


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    16-bitor3l165bor3l225bor3l165b7ps208i-db+16or3l165b7ps240i-dbor3l165b7ba352i-dbor3l165b7bc432i-dbor3l165b7bm680i-dbor3l225b7bc432i-dbor3l225b7bm680i-dbpt35c transistorpt35ctransistor pt36cme 4946pbgapr25dtransistor on 4409307-454946 ahlm 458 ic PDF

    transistor pt36c

    Abstract: datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram
    Contextual Info: Data Sheet November, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


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    sink/12transistor pt36cdatasheet transistor pt36cpt35c transistor+7pt36cmicroprocessor block diagram of plcpt35ctransistor pt42cpt42ctransistor bc 157plc communication cables pin diagram PDF

    LCM-S02002DSR

    Contextual Info:  LatticeECP3 Video Protocol Board – Revision C User’s Guide October 2012 Revision: EB52_01.3  LatticeECP3 Video Protocol Board – Revision C User’s Guide Introduction The LatticeECP3™ FPGA family includes many features for video applications. For example, DisplayPort, SMPTE


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    blm21ag601sn1dlcm-s02002dsr PDF

    BA 5979 S

    Abstract: or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10
    Contextual Info: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 m OR3C and 0.3 μm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


    Original
    or3c804ps208i-dbor3c804ba352i-dbor3t206s208i-dbor3t306s208i-db+16or3t306s240i-dbor3t306ba256i-dbor3t556ps208i-db1or3t556s208i-dbor3t556ps240i-dbor3t556ba256i-dbba 5979 sor3t806ba352-db2764 eepromba 5979bl06 transistoror3t125or3t20or3t30or3t55pt10 PDF

    Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


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    ds1004700mhz600mbps125gbps+1105mw PDF

    Contextual Info: MachXO Family Handbook HB1002 Version 02.0, November 2007 MachXO Family Handbook Table of Contents November 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


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    hb1002tn1086tn1090tn1091+1tn1092 PDF

    Lattice Semiconductor Package Diagrams 256-Ball fpBGA

    Abstract: 16-bit adder
    Contextual Info: LatticeECP2/M Family Data Sheet DS1007 Version 02.1, September 2006 LatticeECP2/M Family Data Sheet Introduction September 2006 Advance Data Sheet DS1007 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic


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    ds1007200mhzecp2-12lattice semiconductor package diagrams 256-ball fpbga+116-bit adder PDF

    BGA 927

    Contextual Info: MachXO Family Handbook HB1002 Version 01.9, February 2007 MachXO Family Handbook Table of Contents February 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


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    hb1002tn1089tn1092bga 927 PDF