PAL12L10 PINOUT Search Results

Contextual Info: Combinatorial PALI 2L10 Series 12L10,14L8,16L6 18L4,20L2,20C1 Ordering information Features/ Benefits • Combinatorial architecture PAL12L10 C NS STD • Security use PROGRAMMABLE ARRAY LOGIC T - PROCESSING STD = Standard XXXX = Other ' PACKAGE NS = Plastic

PAL12L10CNS

Abstract: pal12l10
Contextual Info: Combinatorial PALI 2L10 Series 12L10,14 L8 ,16L6 18L4, 20L2, 20C1 Features/B enefits Ordering Information • Combinatorial architecture PAL12L10 C NS STD • Security fuse PROGRAMMABLE T ARRAY LOGIC - PROCESSING STD = Standard XXXX = Other ARRAY INPUTS - PACKAGE

Contextual Info: Small 24 Series 12L10, 14L8, 16L6, 18L4, 20L2, 20C1 Small 24 Series PAL12L10 PAL14L8 PAL16L6 PAL18L4 PAL20L2 PAL20C1 INPUTS O U T PU T S POLARITY TpD ns (mA) 12 14 16 18 20 20 10 8 6 4 2 2 LOW LOW LOW LOW LOW LOW 40 40 40 40 40 40 100 100 100 100 100 100

12L10

Abstract: 16l6 14l8 Monolithic Memories pal18l4 islez 18L4 20C1 PAL12L10 PAL14L8 PAL16L6
Contextual Info: Small 24 Series 12L10, 14L8, 16L6, 18L4, 20L2, 20C1 Small 24 Series PAL12L10 PAL14L8 PAL16L6 PAL18L4 PAL20L2 PAL20C1 INPUTS OUTPUTS POLARITY T rd ns Ice <mA) 12 14 16 18 20 20 10 8 6 4 2 2 LOW LOW LOW LOW LOW LOW 40 40 40 40 40 40 100 100 100 100 100 100

12L10

Abstract: 16L6 PAL12L10 16JL Monolithic Memories pal18l4 18L4 20C1 PAL14L8 PAL16L6 PAL18L4
Contextual Info: ADV MICRO P LA /P LE /A RRAY S TL D e | Q25752ti GGË7SG5 Q T -4 6-1 3-4 7 '' C o m b in a to r ia l 1 2 L 1 0 , 1 4 L 8 , 1 6 L 6 P A L 1 2 L 1 0 1 8 L 4 , S e r ie s 2 0 L 2 , Ordering Information Features/Benefits • Combinatorial architecture PAL12L10 C NS STD

PAL14L8

Abstract: 20C1A PAL12L10 PINOUT PAL12L10 PAL20L2 programming specification PAL18L4 PAL14L 18L4A PAL16L6 PAL20C1
Contextual Info: 24-Pin Small PAL Family ym National áíá Semiconductor Programmable Array Logic PAL 24-Pin Small PAL Family General Description The 24-pin Small PAL family contains six popular PAL archi­ tectures. The devices in the Small PAL family draw only 100 mA maximum supply current as compared to 210 mA in

ATMEL GAL16V8

Abstract: PAL20P8 GAL16V8 plhs18p8 TI GAL22V10 PLHS16L8 GAL22V10 National AmPAL16R4 GAL16V8 atmel ampal18p8
Contextual Info: GAL Product Line Cross Reference MANUFACTURER ALTERA AMD PART # EP310 EP320 EP330 GAL16V8Z1 GAL16V81 or. GAL18V10 5C031 5C032 85C220 GAL16V81 or. GAL16V8Z or. GAL18V10 85C224 GAL20V81 or. GAL22V10 85C22V10 GAL22V10 PAL10H8 PAL10L8 PAL12H6 PAL12L6

EP320

Abstract: PLS153 gal16v8 EP330 peel18cv8 GAL22V10 National PAL20P8 altera ep320 85C220 EP310
Contextual Info: GAL Product Line Cross Reference MANUFACTURER ALTERA AMD PART # EP310 EP320 EP330 GAL16V8Z1 GAL16V81 or. GAL18V10 5C031 5C032 85C220 GAL16V81 or. GAL16V8Z or. GAL18V10 85C224 GAL20V81 or. GAL22V10 85C22V10 GAL22V10 PAL10H8 PAL10L8 PAL12H6 PAL12L6

National SEMICONDUCTOR GAL16V8

Abstract: EP330 PLHS18P8 EP320 5c032 ATMEL GAL16V8 PALC22V10 ampal18p8 GAL16V8 LA4490
Contextual Info: GAL Product Line Cross Reference MANUFACTURER ALTERA AMD PART # EP310 EP320 EP330 GAL16V8Z1 GAL16V81 or. GAL18V10 5C031 5C032 85C220 GAL16V81 or. GAL16V8Z or. GAL18V10 85C224 GAL20V81 or. GAL22V10 85C22V10 GAL22V10 PAL10H8 PAL10L8 PAL12H6 PAL12L6

gal16v8

Abstract: National SEMICONDUCTOR GAL16V8 gal20v8 PAL20P8 GAL22V10 85C220 PAL16L8 EP330 lattice GAL20V8 AMD PAL20P8
Contextual Info: GAL Product Line Cross Reference MANUFACTURER ALTERA AMD PART # EP310 EP320 EP330 GAL16V8Z1 GAL16V81 or. GAL18V10 5C031 5C032 85C220 GAL16V81 or. GAL16V8Z or. GAL18V10 85C224 GAL20V81 or. GAL22V10 85C22V10 GAL22V10 PAL10H8 PAL10L8 PAL12H6 PAL12L6

Contextual Info: 6L16A 8L14A Decoder Series Ordering Information F eatures/ Benefits • 14 to 16 outputs PAL6L16A C NS STD • Efficient implementation of decoders PROGRAMMABLE ARRAY LOGIC • Security fuse zr T Z PROCESSING STD - Standard XXXX = Other ARRAY INPUTS NS = Plastic

16X4/A4

Abstract: pal20s PAL20S10 pal8l14 PAL20RS8 S/PAL16A4 PAL8L14A
Contextual Info: MONOLITHIC MEMORIES INC t.8 t30Bm D QQQ5M“17 5 § D PAL Programmable Array Logic Devices HAL® (Hard Array Logic) Devices Features/Benefits In addition the PALVHAL device provides these options: • Reduces SSI/M SI chip count greater than 5 to 1 • Variable input/output pin ratio

8L14

Abstract: pal6l16acns PAL6L16A
Contextual Info: ADV M I C R O P L A / P L E / A R R A Y S 1t / Ï Ë J Q2S7Sat OüäVl'H 8 T-46-13-47&#39; Decoder Series 6L16A 8L14A Ordering Inform ation Features/B enefits • 14 to 16 output* PAL6L16A C NS STD • Efficient Implementation of decoder« PROGRAMMABLE ARRAY LOGIC

Contextual Info: GAL20XV10 Lattica High-Speed E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES l/CLK □ - • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax =100 MHz — 7 ns Maximum from Clock Input to Data Output

PAL20L10 LATTICE

Contextual Info: LATTICE SEMICONDUCTOR böE D • SBßbTMT Lattice D D D 2 A 77 T 44 * L A T G A L 2 0 X V 1 0 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz

Contextual Info: Lattice G A L 2 0 X V 1 0 High-Speed E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES l/CLK □ * HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax =100 MHz — 7 ns Maximum from Clock Input to Data Output

Contextual Info: Lattice GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic ; Semiconductor I Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOG Y — 10 ns Maximum Propagation Delay — Fmax = 1 0 0 MHz — 7 ns Maxim um from Clock Input to Data Output

20xv10

Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Contextual Info: GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

GAL20XV10B-10LP

Abstract: 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ PAL12L10
Contextual Info: Specifications GAL20XV10 GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output

GAL20XV10B-10LP

Abstract: GAL20XV10B-15LP 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ PAL12L10 ROCHESTER ELECTRONICS
Contextual Info: GAL20XV10 Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs — UltraMOS® Advanced CMOS Technology

20L10

Abstract: 20XV10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Contextual Info: Specifications GAL20XV10 GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output

20XV10

Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Contextual Info: GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

CM3000

Abstract: 20XV10B
Contextual Info: Lattice G A L 2 0 X V 1 0 B High-Speed E2CMOS PLD Generic Array Logic FU N CTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax =100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Com patible 16 mA O utputs

GAL20XV10B-20LP

Abstract: ali 1631 GAL20XV10B SOCN ICE 47E
Contextual Info: LATTICE SEMICONDUCTOR M7E D 530^4^ Lattice DDDSG32 ILAT 4 G A L20XV10B T - 1/ 6 -1 9 - 0 7 High-Speed E’CMOS PLD Generic Array Logic FU N CTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E*CMOS* TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz