20XV10B Search Results

CM3000

Abstract: 20XV10B
Contextual Info: Lattice G A L 2 0 X V 1 0 B High-Speed E2CMOS PLD Generic Array Logic FU N CTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax =100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Com patible 16 mA O utputs

Contextual Info: Lattice 20XV10B High-Speed E^MOS PLD Generic Array Logic FU N C TIO N AL B LO C K D IAGRAM FEATURES • HIGH PERFORMANCE E*CMOS* TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax s 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

20XV10B

Abstract: GAL20XV10B-10LP
Contextual Info: Lattice G A L 2 0 X V 1 0 B High-Speed E2CMOS PLD Generic Array Logic •■■■■■ FEATURES ■ HIGH PERFORMANCE E’CM O S* TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

Contextual Info: Lattice FEATURES • HIGH PERFORMANCE E’ CM OS* TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax s 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs — UltraMOS Advanced CMOS Technology 20XV10B High-Speed E’CMOS PLD

GAL20XV10B-20LP

Abstract: ali 1631 GAL20XV10B SOCN ICE 47E
Contextual Info: LATTICE SEMICONDUCTOR M7E D 530^4^ Lattice DDDSG32 ILAT 4 G A 20XV10B T - 1/ 6 -1 9 - 0 7 High-Speed E’CMOS PLD Generic Array Logic FU N CTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E*CMOS* TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz