PACKAGE Search Results

54HC573

Contextual Info: SN54HC573, SN74HC573 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D26B4. DECEMBER 1982-REVISED SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads • Bus-Structured Pinout Package Options Include Plastic "Small

Contextual Info: SN54ALS259, SN74ALS259 8 BIT AD D R E S S A B LE LA TC HES D2661, DECEMBER 1982-REVISED MAY 1986 S N 5 4 A L S 2 5 9 . J PACKAGE S N 7 4 A L S 2 5 9 . . . D OR N PACKAGE 8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel Conversion with Storage

C 34 F

Abstract: 1SV274 D234
Contextual Info: SILICON EPITAXIAL PLANAR TYPE VARIABLE CAPACITANCE DIODE 1SV274 C A T V T U N IN G . • • • • High Capacitance Ratio : C2V / C25V = 12.5 Typ. Low Series Resistance : rs = 0.6f2 (Typ.) Excellent C-V Characteristics, and Small Tracking Error. Small Package

Contextual Info: 54AC11109, 74AC11109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0066— D2957, M ARCH 1987— REVISED M ARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11109 . . . J PACKAGE 74AC11109 . . . D OR N PACKAGE TOP VIEW

SN74HC74

Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS094A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D , Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

MP4007

Contextual Info: SILICON NPN EPITAXIAL TYPE POWER TRANSISTOR 4 IN 1 MP4007 HIGH POWER SWITCHING APPLICATIONS. INDUSTRIAL APPLICATIONS Unit in mm HAMMER DRIVE, PULSE MOTOR DRIVE AND INDUCTIVE 25.2 ± 0.2 LOAD SWITCHING. . Small Package by Full Molding. (SIP 10 Pin) . High Collector Power Dissipation.

75ALS126

Abstract: mw137 n75a LS126 SN75129
Contextual Info: SN55ALS126, $N75ALS126 QUADRUPLE LINE DRIVERS D2299, FEBRUARY 1 9 8 6 -REVISED OCTOBER 1989 S N 55A LS126. S N 75A LS126 . . . J PACKAGE S N 75A LS126 . . . D OR N PACKAGE Meets IBM 3 6 0 /3 7 0 I/O Interface Specification G A22-6974-3 Also See SN55ALS130 and SN75ALS130

tlc3741

Abstract: resistor network 104g 9 pin
Contextual Info: TLC374, TLC374Q, TLC374Y LinCMOS QUADRUPLE DIFFERENTIAL COMPARATORS SLCS118A-NOVEMBER 1983-R EVISED OCTOBER 1996 • Single- or Dual-Supply Operation D, J, N, OR PW PACKAGE TOP VIEW • Wide Range of Supply Voltages 2 V to 18 V u 10UT[ • Very Low Supply Current Drain 0.3 mA Typ

Contextual Info: SN5409, SN54LS09, SN54S09, SN7409, SN74LS09, SN74S09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS DECEMBER 1 9 8 3 -R E V IS E D M A R C H 1 9 8 8 Package Options Include Plastic "Sm all Outline" P ackages, Ceram ic Chip Carriers and Flat P ackages, and Plastic and Ceram ic

IC-524

Abstract: 74as
Contextual Info: SN 54AS881A, S N 74AS 8 8 1A ARITH M ETIC LOGIC UNITS/FUNCTION G ENERATORS D 2 6 6 1 , DECEMBER 1 9 8 2 - • Package Options Include Plastic "Small Outline" Packages, Both Plastic and Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs •

Contextual Info: SN74BCT29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER S C B S 257- SEPTEMBER 1987 - REVISED NOVEMBER 1993 DW OR NT PACKAGE • BICMOS Process With TTL Inputs and Outputs T O P V IE W • State-of-the-Art BICMOS Design Significantly Reduces Standby Current

Contextual Info: 54AC11032, 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES TI0060— D2957, JULY 1987— REVISED MARCH 1990 54A C 11032 . . . J PACKAGE 74A C 11032 . . . D OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout TOP VIEW • Center-Pin V c c and GND Configurations to

IR 30 D1

Contextual Info: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O

Contextual Info: SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS S D A S 1 9 0 A - APRIL 1982 - R EVISED DECEMBER 1994 Package Options Include Plastic Small-Outllne D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mll DIPs

Contextual Info: TLC339M, TLC339I, TLC339C QUADRUPLE MICROPOWER LinCMOS COMPARATORS D3135, DECEMBER 1986-R EV ISED FEBRUARY 1989 • Very Low Power. . . 200 jjiW Typ at 5 V T LC 339M . . . J PACKAGE TLC339I. TLC339C . . . D. J, OR N PACKAGE • Fast Response Time . . . 2.5 |xs Typ with

Contextual Info: 54AC11021,74AC11021 DUAL 4-INPUT POSITIVE-AND GATES _ D2957. JULY 1987 - REVISED APRIL 1993 54AC11021 . . . J PACKAGE 74AC11021 . . . D OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations

74AS374

Abstract: IC CLK 374 74ALS374A
Contextual Info: SN74ALS374A, SN74AS374, SN54ALS374A, SN54AS374 OCTAL D-TYPE EDGE-TRIGGERED FUP-FLOPS WITH 3-STATE OUTPUTS D 2 6 6 1 , A P H IL 1982 - R E V IS E D M A Y 1986 D-Type Flip-Flops In a Single Package S N 5 4 A L S 3 7 4 A , S N 5 4 A S 3 7 4 . . . J PAC KAG E

Contextual Info: SILICON MONOLITHIC BIPOLAR LINEAR INTEGRATED CIRCUIT TA4000F VHF-UHF WIDE BAND AMPLIFIER APPLICATIONS FEATURES • Band W id th 700MHz M in. @ 3 dB dow n • Low Noise 4dB (Typ.) @ f = 400MHz • Small Package M A X IM U M RATINGS (Ta = 25°C) CHARACTERISTIC

Contextual Info: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES D2957, JUNE 1987 - REVISED APRIL 1993 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin Vcc and GND Configuration Minimizes High-Speed Switching Noise

IC SN74HC

Abstract: SN74HCTOO SN74HC
Contextual Info: SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE NANO GATES D 3 2 4 3 , NOVEMBER 1968 Inputs are TTL-Voftage Compatible S N 54H C T00 S N 74H C T00 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil

Contextual Info: TOSHIBA PHOTO RELAY TLP595A Unit in mm Telecommunication Data Acquisition Measurement Instrumentation The Toshiba TLP595A consists of an aluminum gallium arsenide infrared emitting diode optically coupled to a photo-MOSFET in a six lead plastic DIP package. The

jl 54123

Abstract: SN64121
Contextual Info: TYPES SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS R E V IS E D D E C E M B E R 1 9 8 3 SN54221, SN54LS221 . . . J OR W PACKAGE SN74221 . . J OR N PACKAGE SN74LS221 . . D, J OR N PACKAGE TOP VIEW 1A C 1 ^ J l 6

transistor 2SK1603

Abstract: 2SK1603 2SK1723 2SK1118 transistor 2sk1723 MOSFET 2SK1358 Transistor Guide 2sk16 packages TYPES FOR MOSFET toshiba transistor smd code 2sk1358
Contextual Info: H it'll Voltage M SFKTs MOSFET Features Toshiba power MOSFET lineup ranges from 60V to 1000V and from 0.5A to 60A. All devices are enhancement types, which means the transistor is normally off. Our wide variety of different packages offers choices for all

Contextual Info: TMS28C64 65,536-BIT ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY • Organization 8K x 8 • Single 5-V Power Supply ± 10% N AND J PACKAGES (TOP VIEW } Q 1 U A 12C 2 A7C 3 Compatible with Existing 64K M O S EPRO M s. PRO M s. R O M s, and EEPR O M s