P109 Search Results

Contextual Info: MINIATURE ALUMINUM ELECTROLYTIC CAPACITORS SRE 5mm height, 85℃ SRM P109 Series Downsized ・5mm height ・Endurance : 1,000 hours at 85℃ ・Non solvent resistant type ・RoHS Compliant SRE ◆SPECIFICATIONS Items Characteristics Category Temperature Range

PA101B

Abstract: PA103 PA104 MICRO-X TRANSISTOR MARK Q6 4 npn transistor ic 14pin upa101g PA102B UPA101 P10944EJ2V0AN00
Contextual Info: Application Note HIGH FREQUENCY NPN TRANSISTOR ARRAYS µPA101 µPA102 µPA103 µPA104 Document No. P10944EJ2V0AN00 2nd edition Date Published November 1999 N CP(K) Printed in Japan 1995, 1999 NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.

Nec K 872

Abstract: uPC1652 transistor NEC D 586 uPC1658C IC 14511 NEC D 586 PC1658C PC1658G UPC1652G TRANSISTOR K 1507
Contextual Info: Application Note Silicon Low-Noise High-Frequency Amplifier IC Usage of µPC1658G Document No. P10965EJ5V0AN00 5th edition Date Published January 2000 N CP(K) Printed in Japan 1996, 2000 [MEMO] 2 Application Note P10965EJ5V0AN00 The information in this document is subject to change without notice.

Contextual Info: APPLICABLE NOTES -1CC 1.2.3 REVSONS P/N ZONE OESCWPnON REV - - D E F ECO 10516 ECO 10618 ECO 11655 OtfE BY 08.05.99 09.07.99 07/07/00 DKN DKN 0 .091 IMG E P109 SSMP FEMALE INTERFACE NOTE(S): 1. MATERIAL(S): 1.1 BODY & CONTACT: BeCu ALLOY PER ASTM B -1 9 6 OR ASTM B -1 9 7

uPC1658C

Abstract: uPC1658 uPC1656 1568G uPC1652 pc1658 uPC1658A 80 nf 100 1658C pc1658C
Contextual Info: Application Note LOW-NOISE HIGH-FREQUENCY AMPLIFIERS µPC1658A µPC1658C µPC1658G Document No. P10965EJ3V0AN00 3rd edition Date Published November 1999 N CP(K) Printed in Japan 1996, 1999 [MEMO] 2 Application Note P10965EJ3V0AN00 • The information in this document is subject to change without notice. Before using this document, please

CA-QFE160SA-G-Z-T-01

Abstract: CA-QFE160SB-G-Z-T-01 P1099
Contextual Info: HINGE SA P1099 2.300" 3.500" Top View 2.550" Q 0.778" 3 0.229" 2 1 0.21" plugged Side View Target PCB land pattern G See Map for proper orientation of the 2 parts Li Lo Part # Q CA-QFE160SA-G-Z-T-01 CA-QFE160SB-G-Z-T-01 1.228" 1.256" G 1.228" 1.256" Li (max)

CA-QFE160SA-L-Z-T-01

Abstract: CA-QFE160SB-L-Z-T-01 MN 1280
Contextual Info: 88.90mm 3.500" Test points P1099 SA 58.42mm 2.300" HINGE 2.54mm 1 Q Side View QFP ZIF socket 19.75mm 0.778" 10.48mm 0.413" 2 Hinge Relative Orientations 3 L Target PCB land pattern Chamfer on foot Li Top and bottom assemblies must be used in orientation shown.

XC3S700A

Abstract: xc3s200aft256 XC3S400AFT256 XC3S50A L01P L02P FG320 UG331 L05P xc3s400a ftg256
Contextual Info: Spartan-3A FPGA Family: Data Sheet R DS529 July 10, 2007 Product Specification Module 1: Introduction and Ordering Information - DS529-1 v1.4.1 July 10, 2007 • • • • • • • Introduction Features Architectural and Configuration Overview General I/O Capabilities

SPX29302

Abstract: SPX2940 139 P109 SPX29152
Contextual Info: Power Management Table of Contents Selection Matrices DC to DC Buck and Boost Regulators . P-4 PWM/PFM Buck Controllers . P-4

Contextual Info: Introduction This manual provides the information needed to configure the PSX Family devices using the JTAG interface. It is intended for users who plan to write their own code to configure the PSX devices. In addition, this manual explains how the boundary scan features implemented in the PSX devices can be used

P281 B01

Abstract: G187
Contextual Info: LogiCORE IP Processing System 7 v4.02a DS871 October 16, 2012 Product Specification Introduction LogiCORE IP Facts Table The Processing System 7 IP is the software interface around the Zynq Processing System. The Zynq -7000 family consists of an system-on-chip (SoC) style

Contextual Info: Product Obsolete/Under Obsolescence R XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table Continued XC4013XLA Pinout Table PAD NAME PQ160 PQ208 PQ240 I/O – – P21 BG256 H1 PAD NAME PQ160 PQ208

digital wattmeter circuit single phase

Abstract: 71M6511 71m651x 40-70HZ 8051 sfr registers pcb layouts of rogowski coil ice 62053 Power factor
Contextual Info: 19-5359; Rev 11/10 71M6511/71M6511H Single-Phase Energy Meter IC A Maxim Integrated Products Brand DATA SHEET NOVEMBER 2010 GENERAL DESCRIPTION FEATURES The 71M6511 is a highly integrated SOC with an MPU core, RTC, flash, and LCD driver. Our Single Converter Technology with a 22-bit deltasigma ADC, three analog inputs, digital temperature compensation,

ADV7343BSTZ2

Abstract: EIA770-3 PAL to ITU-R BT.601/656 Decoder T-1004
Contextual Info: Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs ADV7342/ADV7343 FEATURES EIA/CEA-861B compliance support Programmable features Luma and chroma filter responses Vertical blanking interval VBI Subcarrier frequency (FSC) and phase Luma delay Copy generation management system (CGMS)

Contextual Info: — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — QPRO XQ4000XL Series QML High-Reliability FPGAs R DS029 v2.0 March 7, 2014 2 XQ4000X Series Features • • • • • • • Certified to MIL-PRF-38535 Appendix A QML (Qualified Manufacturer Listing)

xc2s300e pinouts

Abstract: LP1-D12 L43P xc2s300e l36n xc2s50e L26N L28N XC2S200E L18P
Contextual Info: Spartan-IIE 1.8V FPGA Family: Pinout Tables R DS077-4 v1.0 November 15, 2001 Preliminary Product Specification Pin Definitions Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 No Input Clock input pins that connect to Global Clock buffers. These pins

XC3S700AN FGG484

Abstract: XC3S400AN-FGG400 XC3S700A FGG484 xc3s200an XC3S400AN FGG400 FGG676 SPARTAN 3an XC3S50A XC3S700AN-FG484 XC3S700AN
Contextual Info: Spartan-3AN FPGA Family Data Sheet R DS557 June 2, 2008 Module 1: Introduction and Ordering Information - DS557-1 v3.1 June 2, 2008 • • • • • • • • Introduction Features Architectural Overview Configuration Overview In-system Flash Memory Overview

Contextual Info: w WM8351 Wolfson AudioPlus Stereo CODEC with Power Management DESCRIPTION FEATURES The WM8351 is an integrated audio and power management subsystem which provides a cost effective, single-chip solution for portable audio and multimedia systems. Stereo Hi-Fi CODEC

Contextual Info: QPRO XQ4000XL Serles QML flX IU N X High-Reliablllty Field Programmable Gate Arrays May 19, 1998 Version 1.0 XG4QQQX Series Features • • • • • • • • • • • • • • Certified to MIL-PRF-38535 Appendix A QML (Qualified Manufacturer Listing)

wd90c30

Contextual Info: ìm à g in s CORP : S4E J> *5716256 0 0 1 4 7 4 ? b l2 T '5 2 . - 3 V 4 5 WD90C30 High Performance Video Controller :' :i 5 8 WESTERN DIGITAI. she t> m 'jT ia s a a o g im tm ö WE ST ERN D I G I T A L sst h o c w d 9 0C 30 CORP TABLE OF CONTENTS T -5 2 -3 3 -4 5

Contextual Info: flX IU N X Spartan and S p artan X l Families Field Programmable Gate Arrays September 28, 1998 Version 1.2 Preliminary Product Specification Introduction • System level features - Available in both 5.0 Volt and 3.3 Volt versions - On-chip SelectRAM memory

Contextual Info: Spartan and SpartanXL Families Field Programmable Gate Arrays £ XILINX January 6 , 1999 Version 1.4 Prelim inary Product Specification Introduction • The S partan Series is the first high-volum e production FPGA solution to deliver all the key requirem ents for ASIC

RP1207-5

Abstract: P1239
Contextual Info: RP Series TO39 Two-Port SAW Resonators Electrical Connections Temperature Characteristics This two-port, three-terminal SAW resonator is bidirectional. However, impedances and circuit board parasitics may not be symmetrical, requiring slightly different oscillator componentmatching values.

xc4413

Abstract: ATIC 164 D2 XC4013 PG223 xc4405 cn/A/U 237 BG
Contextual Info: f i XILINX XC4400 Hardwire Array Family Preliminary Product Specification Features Description • Mask-programmed versions of Programmable Logic Cell Arrays FPGA The XC4400 Series H ardw ire Arrays are advanced maskprogrammed versions of the XC4000 programmable de­