MMI67 Search Results

Contextual Info: SN74ALS234 64x 4 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY D295B, OCTOBER 1986 - REVISED APRIL 1988 • Asynchronous Operation • Organized as 64 Words of 4 Bits SN74ALS234. N PACKAGE • Data Rates from 0 to 30 MHz • 3-Stata Outputs • Similar to MMI67401B with Higher Speed

2747M

Contextual Info: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT FEATURES: • First-In/First-Out Dual-Port memory • 64 x 4 organization IDT72401/03 • 64 x 5 organization (IDT72402/04) • IDT72401/02 pin and functionally compatible with MMI67401/02 • RAM-based FIFO with low fall-through time

IDT72401

Abstract: IDT72402 IDT72403 IDT72404
Contextual Info: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. FEATURES: First-ln/First-Out dual-port memory 64 x 4 organization IDT72401/03 64 x 5 organization (IDT72402/04) IDT72401/02 pin and functionally compatible with MMI67401/02 RAM-based FIFO with low fall-through time

2748 dc

Abstract: 2748 IDT72413
Contextual Info: IDT72413 CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW typical • RAM-based internal structure allows for fast fall-through

S6144

Abstract: MRON S6-144
Contextual Info: INTEGRATE] DEVICE 14E D • MÔSS771 00037äb A CMOS PARALLEL 64 X 5-BIT FIFO WITH FLAGS DESCRIPTION: FEATURES: • First-ln/Flrst-Out dual-port m em ory-45M H z • 64 x 5 organization • Low power consumption • — Active: 200mW typical) RAM-based Internal structure allows for fast fall-through time

Logic diagram for asynchronous FIFO

Abstract: IDT72413
Contextual Info: IDT72413 CMOS PARALLEL FIFO WITH FLAGS 64 x 5 FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW typical • RAM-based internal structure allows for fast fall-through time

2748 dc

Abstract: 2748 IDT72413 MMI67
Contextual Info: IDT72413 CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW typical • RAM-based internal structure allows for fast fall-through

IDT72401

Abstract: IDT72402 IDT72403 IDT72404
Contextual Info: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out Dual-Port memory 64 x 4 organization IDT72401/03

Contextual Info: IDT72413 CMOS PARALLEL 64 X 5-BIT FIFO WITH FLAGS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: First-In/First-Out Dual-Port memory— 45MHz 64 x 5 organization Low-power consumption — Active: 200mW typical RAM-based internal structure allows for fast fall-through

Contextual Info: bôE J> m 4Û25771 GG13bai B34 « I D T CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS IDT72413 INTEGRATED DEVICE FEATURES: DESCRIPTION: • • • The IDT72413 is a 64 x 5, high-speed First-In/First-Out FIFO that loads and empties data on a first-in-first-out basis.

Contextual Info: IDT72413 CMOS PARALLEL FIFO WITH FLAGS 64 x 5 FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW typical • RAM-based internal structure allows for fast fall-through time

ls236

Contextual Info: SN74ALS236 64x4 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY 0 2 9 5 8 . O C T O B E R 1 9 8 6 - R E V I S E D A P R I L 19 8 B A syn c h ro n o u s Operation SN 74ALS236. Organized at 64 Words of 4 Bits TOP VIEW Data Rates from 0 to 30 MHz NCC IR C SH IF T IN C

2747D

Abstract: IDT72401 IDT72402 IDT72403 IDT72404 C2747 q2303
Contextual Info: INTEGRATED DEVICE M7 E D Hi >4025771 0 0 0 ^ ^ CMOS PARALLEL FIFO ' T 64 X 4-BIT AND 64 X 5-BIT Integrated Device Technology, Inc. FEATURES: First-In/First-Out dual-port memory 64 x 4 organization IDT72401/03 64 x 5 organization (IDT72402/04) IDT72401/02 pin ancf functionally compatible with

AGORA

Abstract: IDT72413
Contextual Info: fe /' CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS IDT72413 Integrated Device T echnology, Inc. FEATURES: DESCRIPTION: • • • The IDT72413 is a 64 x 5, high speed First-In/First-Out FIFO that loads and empties data on afirst-in-first-out basis. It is expandable in bit width. All speed versions are cascad­

2748 dc

Abstract: 2748 IDT72413
Contextual Info: IDT72413 CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW typical • RAM-based internal structure allows for fast fall-through

IDT72401

Abstract: IDT72402 IDT72403 IDT72404
Contextual Info:  IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out Dual-Port memory 64 x 4 organization IDT72401/03

MMI67401

Contextual Info: INTEGRATED DEVICE il!!*# IntegratedDeviceTèchndogy,Inc 14E D 4Ô55771 00Ü377S 3 ^ C M O S PARALLEL FIFO 64 x 4-B IT AND 64 x 5-B IT . : • FEATURES: • First-ln/Flrst-Out dual-port memory • 64 x 4 organization IDT72401/03) • 64 x 5 organization (IDT72402/04)

ir413

Abstract: IDT72401 IDT72402 IDT72403 IDT72404
Contextual Info: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • • First-ln/First-Out Dual-Port memory 64 x 4 organization IDT72401/03

Contextual Info: g g p -x m d t Integrated Device Technology, Inc. CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS IDT72413 FEATURES: DESCRIPTION: • First-In/First-Out dual-port memory— 45MHz • 64 x 5 organization • Low power consumption — Active: 200mW typical) • FlAM-based Internal structure allows for fast fall-through

Contextual Info: 4B2S771 □ D2 b 3 ö i 4 T 7D CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Output Enable OE pin. The FIFOs accept 4-bit or 5-bit data at the data input (Do-D3,4 ). The stored data stack up on a firstin/first-out basis. A Shift Out (SO) signal causes the data at the next to last

MR 4007

Contextual Info: CMOS PARALLEL FIFO WITH FLAGS IDT72413 6 4 x 5 I n t e g r a t e d D e v iz e T e c h n o lo g y , l i e . DESCRIPTION: FEATURES: First-In/First-Out Dual-Port memory— 45MHz 64 x 5 organization Low-power consumption — Active: 200mW typical RAM-based internal structure allows for fast fall-through

2748 dc

Abstract: 2748 fifo cascade depth pointer
Contextual Info: IDT72413 CMOS PARALLEL FIFO WITH FLAGS 64 x 5 FEATURES: DESCRIPTION: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW typical • RAM-based internal structure allows for fast fall-through time

Contextual Info: Integrated Device Technology, Inc. CMOS PARALLEL 64 X 5-BIT FIFO WITH FLAGS IDT72413 DESCRIPTION: FEATURES: The IDT72413 is a 64 x 5, high-speed First-In/First-Out FIFO that loads and empties data on a first-in-first-out basis. It is expandable in bit width. All speed versions are cascad­

IDT72401

Abstract: IDT72402 IDT72403 IDT72404
Contextual Info: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out Dual-Port memory 64 x 4 organization IDT72401/03