MC100EPT Search Results

KPT25

Abstract: EPT25 MC100EPT25 MC100EPT25D MC100EPT25DR2 MC100EPT25DT MC100EPT25DTR2 KA25 kpt25 alyw
Contextual Info: MC100EPT25 −3.3V / −5V Differential ECL to +3.3V LVTTL Translator The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, -3.3 V to -5.2 V, and ground. The small outline 8-lead package and the single gate of the EPT25 make it ideal

LQFP32

Abstract: LQFP-32 MC100 MC100EPT622 MC100EPT622FA MC100EPT622FAR2
Contextual Info: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator The MC100EPT622 is a 10- Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR- ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs

KPT21

Abstract: 100EP MC100EPT21 MC100EPT21D MC100EPT21DR2 EPT21
Contextual Info: MC100EPT21 Differential LVPECL to LVTTL Translator The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package makes the EPT21 ideal for applications which require the translation of a

Contextual Info: MOTO RO LA °rderNumber:M R ro” Semiconductor Components M C 100EPT23 ♦ SO -8, D SUFFIX 8-LEAD PLASTIC SOIC PACKAGE CASE 751-06 ORDERING INFORMATION MC100EPT23D Product Preview D ual D iffe re n tia l LVPECL to LVTTL T ra n s la to r SOIC PIN DESCRIPTION

Contextual Info: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator Description The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which

KPT23

Abstract: marking kpt23 MC100EPT23DG EPT23 MC100EPT23 AN1642
Contextual Info: MC100EPT23 3.3V Dual Differential LVPECL/LVDS to LVTTL Translator The MC100EPT23 is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL Positive ECL or LVDS levels are used, only +3.3 V and ground are required. The small outline 8-lead package

Contextual Info: MOTOROLA Order this document by MC10EPT26/D SEMICONDUCTOR TECHNICAL DATA Product Preview MC10EPT26 MC100EPT26 1:2 Fanout D ifferential PECL to TTL Translator The MC10EPT26 is a 1:2 Fanout Differential PECL to TTL translator. Because PEL Positive ECL levels are used only +3.3V and ground are

KPT23

Contextual Info: MC100EPT23 Dual Differential LVPECL to LVTTL Translator The M C100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive EC L levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the EPT23 makes it ideal for

socket 775 pinout

Abstract: MC100 MC100EPT622 MC100EPT622FA MC100EPT622FAG
Contextual Info: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs

Contextual Info: MOTO RO LA °rderNumber:M RceI°„” Semiconductor Components M C 100E P T 21 SO -8, D SUFFIX 8-LEAD PLASTIC SOIC PACKAGE CASE 751 7 fi, rJ • i i ! ) ORDERING INFORMATION : MC100EPT21D ?" Product Preview D iffe re n tia l LVPECL to LVTTL T ra n s la to r

Contextual Info: MOTO RO LA °rderNumber:M RceI°„” Semiconductor Components M C 100EPT26 SO -8, D SUFFIX 8-LEAD PLASTIC SOIC PACKAGE CASE 751 ORDERING INFORMATION j D . J - rJ î i i MC100EPT26D i r } - v j A vÎ SOIC V ü / Product Preview 1:2 F an o u t D iffe re n tia l

KPT21

Abstract: MC100EPT21
Contextual Info: MC100EPT21 3.3VĄDifferential LVPECL to LVTTL Translator The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The small outline 8–lead SOIC package makes the EPT21 ideal for applications which require the translation of a

KPT23

Contextual Info: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate

KA23A

Contextual Info: MC100EPT23 3.3V Dual Differential LVPECL/LVDS to LVTTL Translator The MC100EPT23 is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL Positive ECL or LVDS levels are used, only +3.3 V and ground are required. The small outline 8-lead package

king 525

Abstract: 100EP MC100EPT21 MC100EPT21D
Contextual Info: MOTOROLA Order Number: MC100EPT21/D Rev. 0, 05/1999 Semiconductor Components MC100EPT21 SO–8, D SUFFIX 8–LEAD PLASTIC SOIC PACKAGE CASE 751 ORDERING INFORMATION MC100EPT21D SOIC Product Preview Differential LVPECL to LVTTL Translator • • • • •

100EP

Abstract: MC100EPT26 MC100EPT26D
Contextual Info: MOTOROLA Order Number: MC100EPT26/D Rev. 0, 05/1999 Semiconductor Components MC100EPT26 SO–8, D SUFFIX 8–LEAD PLASTIC SOIC PACKAGE CASE 751 ORDERING INFORMATION MC100EPT26D SOIC Product Preview 1:2 Fanout Differential LVPECL to LVTTL Translator • •

Contextual Info: MC100EPT26 3.3V 1:2 Fanout Differential LVPECL to LVTTL Translator The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The small outline 8−lead package and the 1:2

HR21

Abstract: MC100EPT21 MC100EPT21D MC100EPT21DR2 MC100EPT21DT
Contextual Info: MC100EPT21 Differential LVPECL to LVTTL Translator The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package makes the EPT21 ideal for applications which require the translation of a

EPT25

Abstract: KPT25 MC100EPT25
Contextual Info: MC100EPT25 -3.3V / -5V Differential ECL to +3.3V LVTTL Translator Description The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal

HA20

Abstract: MC10EPT20 EPT20 HPT20 KPT20 MC100EPT20
Contextual Info: MC10EPT20, MC100EPT20 3.3V LVTTL/LVCMOS to Differential LVPECL Translator The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline SOIC−8 package and the

Contextual Info: MC100EPT21 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL Positive ECL , LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small

KPT22

Abstract: EPT22 MC100EPT22 MC100EPT22D MC100EPT22DR2
Contextual Info: MC100EPT22 3.3VĄDual LVTTL/LVCMOS to Differential LVPECL Translator The MC100EPT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The small outline 8–lead package

MC100EPT24

Abstract: MC100EPT24D MC100EPT24DR2 MC100EPT24DT MC100EPT24DTR2 ka24
Contextual Info: MC100EPT24 3.3VĄLVTTL/LVCMOS to Differential LVECL Translator The MC100EPT24 is a LVTTL/LVCMOS to differential LVECL translator. Because LVECL levels and LVTTL/LVCMOS levels are used, a –3.3 V, +3.3 V and ground are required. The small outline 8–lead package and the single gate of the EPT24 makes it ideal for

MC100EPT24

Abstract: KPT24
Contextual Info: MC100EPT24 3.3V LVTTL/LVCMOS to Differential LVECL Translator Description The MC100EPT24 is a LVTTL/LVCMOS to differential LVECL translator. Because LVECL levels and LVTTL/LVCMOS levels are used, a −3.3 V, +3.3 V and ground are required. The small outline