MC100EP1 Search Results

AZ100EP16VS

Abstract: AZ100EP16VST AZ10EP16VS AZ10EP16VST MC100EP16VS NC 1350
Contextual Info: ARIZONA MICROTEK, INC. AZ10EP16VS AZ100EP16VS ECL/PECL Differential Receiver with Variable Output Swing FEATURES • • • • • Silicon-Germanium for High Speed Operation 150ps Typical Propagation Delay AZ100EP16VS Functionally Equivalent to ON Semiconductor MC100EP16VS

LVDS100

Abstract: MC100EP16 SN65LVDS100 SN65LVDS100D SN65LVDS100DGK SN65LVDS101 SN65LVDT100 SN65LVDT100D SN65LVDT101
Contextual Info: SN65LVDS100, SN65LVDT100 SN65LVDS101, SN65LVDT101 www.ti.com SLLS516B − AUGUST 2002 − REVISED SEPTEMBER 2003 DIFFERENTIAL TRANSLATOR/REPEATER FEATURES D Designed for Signaling Rates 1 . 2 Gbps D Total Jitter < 65 ps D Low-Power Alternative for the MC100EP16

KEP16

Abstract: LVEL16 MC100EP16 MC10EP16
Contextual Info: MC10EP16, MC100EP16 3.3V / 5V ECL Differential Receiver/Driver Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 8 1 Features TSSOP−8 DT SUFFIX CASE 948R • 220 ps Typical Propagation Delay • Maximum Frequency > 4 GHz Typical

MC100EP111

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC100EP111 Low-Voltage 1:10 Differential ECL/PECL Clock Driver The MC100EP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input

100EP

Abstract: EP14 MC100EP14
Contextual Info: MC100EP14 3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver Description The MC100EP14 is a low skew 1−to−5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or

Contextual Info: MC10EP105, MC100EP105 3.3V / 5VĄECL Quad 2-Input Differential AND/NAND The MC10/100EP105 is a quad 2–input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

Contextual Info: MC100EP196B 3.3 V ECL Programmable Delay Chip With FTUNE Descriptions The MC100EP196B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar

Contextual Info: MC100EP195B 3.3V ECL Programmable Delay Chip Descriptions The MC100EP195B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and

Contextual Info: ECL Pro ECL Pro™ SY100EP195V SY100EP195V FINAL 3.3V/5V 2.5GHz PROGRAMMABLE DELAY CHIP Micrel FEATURES • Pin-for-pin, plug-in compatible to the ON Semiconductor MC100EP195 ■ Maximum frequency > 2.5GHz ■ Programmable range: 2.2ns to 12.2ns ■ 10ps increments

MC100EP16T

Abstract: MC10EP16T
Contextual Info: MC10EP16T, MC100EP16T 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Description The EP16T is a world−class differential receiver/driver. The device is functionally equivalent to the EP16 with internal termination resistors. A 50 W resistor is connected from the D input to the VT pin

SY100EP196V

Abstract: SY100EP196VTG SY100EP196VTGTR SY100EP196VTI SY100EP196VTITR MC100EP196 MC100EP196FA MC100EP196FAR2
Contextual Info: ECL Pro SY100EP196V ECL Pro® 3.3V/5V 2.5GHz PROGRAMMABLE DELAY WITH FINE TUNE CONTROL Micrel, Inc. SY100EP196V FEATURES • Pin-for-pin, plug-in compatible to the ON Semiconductor MC100EP196 ■ Maximum frequency > 2.5GHz ■ Programmable range: 2.2ns to 12.2ns

MC100EP195

Abstract: MC100EP195FA MC100EP195FAR2 SY100EP195V SY100EP195VTI SY100EP195VTITR SY100EP196VTI M0643-121504
Contextual Info: ECL Pro 3.3V/5V 2.5GHz PROGRAMMABLE DELAY CHIP Micrel SY100EP195V ECL Pro® SY100EP195V FEATURES • Pin-for-pin, plug-in compatible to the ON Semiconductor MC100EP195 ■ Maximum frequency > 2.5GHz ■ Programmable range: 2.2ns to 12.2ns ■ 10ps increments

EP105

Abstract: MC100EP105 MC100EP105FA MC100EP105FAR2 MC10EP105 MC10EP105FA MC10EP105FAR2 marking CODE D2B
Contextual Info: MC10EP105, MC100EP105 3.3V / 5VĄECL Quad 2-Input Differential AND/NAND The MC10/100EP105 is a quad 2–input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

KEP65

Abstract: KP65
Contextual Info: MC100EP16VB 3.3V / 5V ECL Differential Receiver/Driver with High and Low Gain The EP16VB is a world−class differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with both high and low gain outputs. QHG and QHG outputs have a DC

E131

Abstract: MC100EP131 MC10EP131 QFN32 QFN32* socket
Contextual Info: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.

dh2u

Abstract: kp140 MC10EP140 100EP AND8040 MC100EP140
Contextual Info: MC100EP140 3.3V ECL Phase−Frequency Detector Description The MC100EP140 is a three state phase frequency−detector intended for phase−locked loop applications which require a minimum amount of phase and frequency difference at lock. Since the part is

ic 4075 datasheet

Abstract: m 1305 KEP66 MC100EP16VC
Contextual Info: MC100EP16VC 3.3V / 5V ECL Differential Receiver/Driver with High Gain and Enable Output Description http://onsemi.com MARKING DIAGRAMS* 8 1 SOIC−8 D SUFFIX CASE 751 1 TSSOP−8 DT SUFFIX CASE 948R 8 KEP66 ALYW G 1 8 8 1 KP66 ALYWG G DFN8 MN SUFFIX CASE 506AA

MC100EP16T

Abstract: MC10EP16T
Contextual Info: MC10EP16T, MC100EP16T 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Description The EP16T is a world−class differential receiver/driver. The device is functionally equivalent to the EP16 with internal termination resistors. A 50 W resistor is connected from the D input to the VT pin

EP105

Abstract: MC100EP105 MC10EP105
Contextual Info: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

MC100EP142

Abstract: MC10EP142
Contextual Info: MC10EP142, MC100EP142 3.3V / 5V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in

MC100EP139DTG

Abstract: MC100EP139 MC10EP139 3815 dc
Contextual Info: MC10EP139, MC100EP139 3.3V / 5V ECL ÷2/4, ÷4/5/6 Clock Generation Chip Description The MC10/100EP139 is a low skew ÷2/4, ÷4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common

MC100EP111

Contextual Info: MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Low-Voltage 1:10 Differential ECL/PECL/HSTL Clock Driver Freescale Semiconductor, Inc. The MC100EP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input

KEP11

Abstract: HEP11 KP11 MC100EP11 MC10EP11 EP11 LVEL11
Contextual Info: MC10EP11, MC100EP11 3.3V / 5V ECL 1:2 Differential Fanout Buffer Description The MC10/100EP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the LVEL11 device. With AC performance much faster than the LVEL11 device, the EP11 is ideal

KEP16

Abstract: LVEL16 MC100EP16 MC10EP16
Contextual Info: MC10EP16, MC100EP16 3.3V / 5V ECL Differential Receiver/Driver Description MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 1 • 220 ps Typical Propagation Delay • Maximum Frequency > 4 GHz Typical • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V