EP111 Search Results

Contextual Info: EP111 Low Voltage 1:10 Differential LVECL/LVPECL/HSTL Clock Driver TEST AND MEASUREMENT PRODUCTS Description The EP111, as with most other LVECL devices, can be operated from a positive VCC supply in LVPECL mode. This allows the EP111 to be used for high

Contextual Info: eorex EP1117 1A Low Dropout Linear Regulator Features Description • Guaranteed Output Voltage Accuracy within 2% • Fast Transient Response • Load Regulation: 0.1% Typ. • Line Regulation: 0.03% Typ. • Low Dropout Voltage: 1.1V Typ. at IOUT =1A • On-chip Thermal Limiting: 150°C Typ.

13mf

Abstract: REGULATOR AVR R 129 Rev A EP1117 EP1117-25 EP1117-33
Contextual Info: Preliminary EP1117 1A Low Dropout Regulator FEATURES • Guaranteed Output Voltage Accuracy within 2% • Fast Transient Response • Load Regulation : 0.1% Typ. • Line Regulation : 0.03% Typ. • Low Dropout Voltage : 1.1V Typ. at IOUT =1A • Current Limit : 1A Typ. at TJ=25°C

Contextual Info: EP111 Low Voltage 1:10 Differential LVECL/LVPECL/HSTL Clock Driver HIGH-PERFORMANCE PRODUCTS Description The EP111, as with most other LVECL devices, can be operated from a positive VCC supply in LVPECL mode. This allows the EP111 to be used for high

EP1117

Abstract: EP1117-25 EP1117-33
Contextual Info: eorex EP1117 1A Low Dropout Linear Regulator Features Description • Guaranteed Output Voltage Accuracy within 2% • Fast Transient Response • Load Regulation: 0.1% Typ. • Line Regulation: 0.03% Typ. • Low Dropout Voltage: 1.1V Typ. at IOUT =1A • On-chip Thermal Limiting: 150°C Typ.

CDCLVP110

Abstract: CDCLVP110MVFR LVEP111 MC100 PTN1111 SCAA056
Contextual Info: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock

MC100EP111

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview EP111 Low-Voltage 1:10 Differential ECL/PECL Clock Driver The EP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input

SK10EP111

Abstract: EP111
Contextual Info: SEMTECH Today's Results .Tomorrow's Vision Low-Voltage 1:10 Differential ECL/PECL/HSTL Clock Driver EP111 Preliminary Information October 4, 1999 This document contains information on a new product. The parametric information, although not fully characterized, is the result

12MHZ

Abstract: SY89420V frequency multiplier SY89420 SY89421V SY89426 EP111
Contextual Info: Single-Chip Programmable Clock PLLs Create 155MHz and 622MHz Frequencies and More! 12MHz – 1.12GHz Wideband PLL ange R t u Inp 0MHz e c eren z – 65 f e R H 12M PLL HFOUT SY89421V Multiplier Select Output Range 12MHz – 1.12GHz FOUT Post Divide FOUT Frequency Select

CDCLVP110

Abstract: LVEP111 MC100 PTN1111 SCAA056 S-PQFP-G32 scas683
Contextual Info: CDCLVP110 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER SCAS683 A– JUNE 2002 – REVISED AUGUST 2002 D Distributes One Differential Clock Input D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 Pair LVPECL/HSTL to Ten Differential LVPECL Clock Outputs

mic5380

Abstract: nu-horizons KSZ8863 KSZ8863MLL KSZ9021RN PQFP-128 footprint KSZ8863MLL EVAL KSZ8851SNL SFP EVAL BOARD MIC26950
Contextual Info: Shortform Catalog July 2010 Shortform Catalog July 2010 2010 Micrel, Inc. The information furnished by Micrel, Inc., in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use, nor any infringements of patents

MC100EP111

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information EP111 Low-Voltage 1:10 Differential ECL/PECL/HSTL Clock Driver The EP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input

cdclvp111vf

Abstract: CDCLVP111 CDCLVP111RHBR LVEP111 MC100 PTN1111 QFN32 SCAA056
Contextual Info: CDCLVP111 www.ti.com SCAS859C – JANUARY 2009 – REVISED NOVEMBER 2009 LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER Check for Samples :CDCLVP111 FEATURES APPLICATIONS • • • 1 2 • • • • • • • • Distributes One Differential Clock Input Pair

CDCLVP110

Abstract: CDCLVP110VF LVEP111 MC100 PTN1111 SCAA056
Contextual Info: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL

MC100EP111

Contextual Info: MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Low-Voltage 1:10 Differential ECL/PECL/HSTL Clock Driver Freescale Semiconductor, Inc. The EP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input

BTS134D

Abstract: VPT09051
Contextual Info: S IE M E N S H ITFET B T S 1 3 4 D Smart Lowside Power Switch Features • Logic Level Input Product Summary Drain source voltage ^DS 42 V • Input Protection ESD On-state resistance f i DS(on) 50 m il • Thermal shutdown with Nominal load current ^D(ISO)

Contextual Info: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL

MC100EP111

Contextual Info: MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order this document by EP111/D DATA SHEET Low–Voltage 1:10 Differential Driver Low–Voltage 1:10 Differential ECL/PECL/HSTL Clock ECL/PECL/HSTL Clock Driver Freescale Semiconductor, Inc.

INSSTE32882

Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B
Contextual Info: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer

Contextual Info: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock

Contextual Info: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL

Contextual Info: MOTOROLA Order Number: AN1934/D SEMICONDUCTOR TECHNICAL DATA Rev 0, 09/2001 AN1934 Effects of Skew and Jitter on Clock Tree Design Prepared by: Don Aldridge and Tom Borr September, 2001 ABSTRACT This application note discusses the parametrics of skew and jitter as these terms apply to PLL clock drivers and clock buffers.

nu-horizons

Abstract: KSZ8041FTL SFP KSZ8895 driver MIC5318 KSZ8895 27mhz rf amplifier MOSFET to220 micrel shortform KSZ8895f MICREL MIC marking LGA-76
Contextual Info: Shortform Catalog February 2011 Shortform Catalog February 2011 2011 Micrel, Inc. The information furnished by Micrel, Inc., in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use, nor any infringements of patents

Contextual Info: CDCLVP111 www.ti.com . SCAS859 – JANUARY 2009 LOW-VOLTAGE 1:10 LVPECL