MAX9400 Search Results

Contextual Info: 19-2223; Rev 2; 1/05 Quad Differential LVECL/LVPECL Buffer/Receivers Features The MAX9400/MAX9402/MAX9403/MAX9405 are extremely fast, low-skew quad LVECL/ECL or LVPECL/ PECL buffer/receivers designed for high-speed data and clock driver applications. These devices feature an

Contextual Info: 19-2313; Rev 0; 1/02 MAX9400 Evaluation Kit Features ♦ Controlled 50Ω Coplanar Traces ♦ Input Trace Lengths Matched to <2mils ♦ Output Trace Lengths Matched to <1mil ♦ Frequency Range Up to 3.0GHz MAX9400/MAX9402/MAX9403/ MAX9405 Up to 2.0GHz (MAX9401/MAX9405)

Contextual Info: 19-2223; Rev 2; 1/05 Quad Differential LVECL/LVPECL Buffer/Receivers Features The MAX9400/MAX9402/MAX9403/MAX9405 are extremely fast, low-skew quad LVECL/ECL or LVPECL/ PECL buffer/receivers designed for high-speed data and clock driver applications. These devices feature an

EMK107BJ104KA

Abstract: GRM39X7R104K016A MAX9400 MAX9401 MAX9405 TAJB106K010R
Contextual Info: 19-2313; Rev 0; 1/02 MAX9400 Evaluation Kit Features ♦ Controlled 50Ω Coplanar Traces ♦ Input Trace Lengths Matched to <2mils ♦ Output Trace Lengths Matched to <1mil ♦ Frequency Range Up to 3.0GHz MAX9400/MAX9402/MAX9403/ MAX9405 Up to 2.0GHz (MAX9401/MAX9405)

MAX9400

Abstract: MAX9400EGJ MAX9400EHJ MAX9402 MAX9402EHJ MAX9403 MAX9405 QFN100
Contextual Info: 19-2223; Rev 2; 1/05 Quad Differential LVECL/LVPECL Buffer/Receivers Features The MAX9400/MAX9402/MAX9403/MAX9405 are extremely fast, low-skew quad LVECL/ECL or LVPECL/ PECL buffer/receivers designed for high-speed data and clock driver applications. These devices feature an

MAX9400

Abstract: MAX9400EGJ MAX9400EHJ MAX9402 MAX9402EHJ MAX9403 MAX9405
Contextual Info: 19-2223; Rev 1; 1/02 Quad Differential LVECL/LVPECL Buffer/Receivers These devices operate with a supply voltage of VCC VEE = 2.375V to 5.5V, and are specified for operation from -40°C to +85°C. These devices are offered in space-saving 32-pin 5mm ✕ 5mm TQFP and 32-lead

HDMI to vga pinout

Abstract: MAX9180 lvds 26 pin MAX9259 MAX9374 MAX9384 Video sync splitter vga SK4401 HDMI to VGA Cable diagram MAX9324
Contextual Info: High-Speed Interconnect 8th Edition February 2009 Industry’s most versatile portfolio of high-speed interface ICs Automotive SerDes for video and audio data Rear-Seat Entertainment Navigation Safety Cameras Fanout buffers, muxes, and crosspoint switches for clock and data distribution

max14574

Abstract: MAX1786 MAX1788 MAX8899 DS1849 MAX16908 MAX4967 DS3610 max17018 max13487
Contextual Info: Monitor Reports by Product: 1. Find the product of interest in the table below. Note the process and/or package for that product. 2. Use the "Back" button to return to the home page. 3. Select the process in the "Process Reliability" for the product of interest.

Maxim Integrated Products

Abstract: MAX6377XR23-T MAX1692EUB MAX626CSA NCP1031DR2G MAX766 MAX6816EUS MAX762ESA MAX4420ESA MAX811SEUS-T
Contextual Info: Competitor Name Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc

Contextual Info: 19-2223; Rev 0; 10/01 Quad Differential LVECL/LVPECL Buffer/Receivers These devices operate with a supply voltage of VCC VEE = +2.375V to +5.5V, and are specified for operation from -40°C to +85°C. These devices are offered in space-saving 32-pin 5mm ✕ 5mm TQFP and 32-lead

MAX9402

Abstract: MAX9402EHJ MAX9403 MAX9405 MAX9400 MAX9400EGJ MAX9400EHJ
Contextual Info: 19-2223; Rev 1; 1/02 Quad Differential LVECL/LVPECL Buffer/Receivers These devices operate with a supply voltage of VCC VEE = 2.375V to 5.5V, and are specified for operation from -40°C to +85°C. These devices are offered in space-saving 32-pin 5mm ✕ 5mm TQFP and 32-lead

AN1916

Abstract: MAX9386 MAX9310 MAX9311 MAX9315 MAX9316 MAX9317 MAX9320 MAX9322 MAX9360
Contextual Info: Maxim > App Notes > HIGH-SPEED INTERCONNECT Keywords: jitter, gaussian, random, RJ, deterministic, cycle to cycle, adjacent cycle, duty cycle distortion, pulse width distortion, inter-symbol, bit error rate, BER, ber Mar 06, 2003 APPLICATION NOTE 1916 An Introduction to Jitter in Communications Systems