MACRO IN Search Results

AO4A

Abstract: AO11 ao1b or3b DL2C EDLE2
Contextual Info: Accelerator Series Hard Macro Library – Graphical Symbols The following illustrations show all the available hard macros. The Actel Macro Library Guide contains module count, combinability, and pin loading information of each hard macro. It also includes a complete truth table for each macro.

AO4A

Abstract: ao1b ao1a nor2b xo1a D0AY ax1b
Contextual Info: ACT 1 Hard Macro Library Overview – Graphical Symbols The following illustrations show all the available hard macros. The Actel Macro Library Guide contains module count, combinability, and pin loading information of each hard macro. It also includes a complete truth table for each macro.

AO4A

Abstract: AO11 DFC-1 dl2d AO2B cy2b OR5B
Contextual Info: Integrator Series Hard Macro Library – Graphical Symbols The following illustrations show all the available hard macros. The Actel Macro Library Guide contains module count, combinability, and pin loading information of each hard macro. It also includes a complete truth table for each macro.

MM5221

Abstract: HA5221
Contextual Info: HA5221 TM Macro Model 1 January 2002 MM5221 1-888-INTERSIL or 321-724-7143 | Intersil and design is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1991 and 2002, All Rights Reserved Macro Model MM5221 2 Macro Model MM5221 3 Macro Model MM5221

ic D flip flop 7474

Abstract: IC 7474 truthtable philips for ic 7474 7474 D flip-flop circuit diagram PLHS502 7474 D flip-flop IC 7474 flipflop pin DIAGRAM OF IC 7474 INTERNAL DIAGRAM OF IC 7474 any boolean circuit using nand gates
Contextual Info: Philips Semiconductors Programmable Logic Devices Designing with programmable macro logic INTRODUCTION TO PROGRAMMABLE MACRO LOGIC DESIGN CONCEPTS Programmable Macro Logic PML , an extension of the Programmable Logic Array (PLA) concept combines a programming or

APA300-PQ208

Abstract: AC247 macro APA300 APA30
Contextual Info: Application Note AC247 Macro Constraint Usage in ProASICPLUS Design Flow Introduction The use of macro constraints offers designers increased performance of sub-blocks and greater control over the configuration and placement of these individual blocks in their design. A macro constraint

Assembler

Abstract: Z8038000ZAS
Contextual Info: Z8038000ZAS S UPPOR TP RODUCT Z8038000ZAS Z80380 ASSEMBLER, LINKER AND LIBRARIAN GENERAL DESCRIPTION The Z80380 Macro Assembler Requirements The Z80380 Macro Assembler ZASM generates relocatable object code modules in IEEE 695 OMF format. The assembler also handles macros and conditional assembly, eliminating the need for a macro preprocessor.

atmel 444

Abstract: AT6000 Series
Contextual Info: ATDS2100SN/HP Features • • • • • • • • • • • • • Atmel Design Manager AT6000 Macro Libraries for Powerview Schematic Entry and Simulation AT6000 Macro Libraries for ViewSynthesis Automatic Macro Generators Automatic Place and Route

ATDM2101PC

Abstract: ATDS2101PC
Contextual Info: ATDS2101PC Features • • • • • • • • • • • • • • • Viewlogic PROcapture Schematic Entry Atmel Design Manager AT6000 Macro Libraries for PROcapture & PROsim AT6000 Macro Libraries for PROsynthesis Automatic Macro Generators Automatic Place and Route

parallel to serial conversion

Abstract: diode 1432
Contextual Info: Temic COMLIB MATRA MHS ATM Physical Layer ASIC Macro Library for 1.432 Description The ASIC Macro Library is consisting of specific macros which are supporting the ATM 1.432 Physical M edium Sublayer up to 622 MBit/s serial communication. This macro family, which is targeted

Contextual Info: CodeWarrior Development Studio Macro-processor Language Reference Manual Document Number: CWPEXMLREF Rev 10.5, 9/2013 CodeWarrior Development Studio Macro-processor Language Reference Manual, Rev. 10.5, 9/2013 2 Freescale Semiconductor, Inc. Contents Section number

TA688

Abstract: 7input and gate ao1b AO11 TA164 TA-191 TA153 TA190 DLM8 TA273
Contextual Info: Integrator Series Macro Library – Tables of Hard, Soft, and TTL Macros Hard Macros—Combinatorial Modules Function Macro Description Combinatorial Logic Module CM8 Combinational Module Full 1200XL and 3200DX Logic Module Sequential Logic Module DFM7A

8086 opcode sheet free download

Abstract: free download intel 8086 opcode sheet 8051 mx philips intel 8086 Arithmetic and Logic Unit -ALU 8086 hex code intel 8086 opcode sheet 8086 opcode sheet SDA555X 80c51mx 7401 ic configuration
Contextual Info: Macro Assembler and Utilities Macro Assembler, Linker/Locator, Library Manager, and Object-HEX Converter for 8051, Extended 8051, and 251 Microcontrollers User’s Guide 02.2001 2 Information in this document is subject to change without notice and does not

ACTEL 1020B

Contextual Info: ACTgen Library Components ACTgen Macro Builder The features of ACTgen Macro Builder include the following: • Automatically generates high-performance custom data-path macros from selected parameters • Supports trade-offs between high performance and efficient use of resources

99c14

Abstract: AN-117 OP-42 Advanced SPICE Macro-model AN-117 OP-42
Contextual Info: ANALOG ► DEVICES AN-117 APPLICATION NOTE ONE TECHNOLOGY WAY • P.O. BOX 9106 • NORWOOD, MASSACHUSETTS 02062-9106 • 617/329-4700 OP-42 Advanced SPICE Macro-Model by Joe Buxton INTRODUCTION This application note describes the SPICE macro-model for the

ORELA 4500

Abstract: toccata WOLA adaptive reference wola WDRC WOLA reference 4500 Series
Contextual Info: AND8384/D Using Block Floating-Point in the WOLA Filterbank Coprocessor http://onsemi.com APPLICATION NOTE WOLA_Start macro, specifying the desired function as a parameter 0 for analysis, 1 for gain application and 2 for synthesis . Consequently, only a “start” macro execution is

pd71055

Abstract: NEC 71055 uPD7105 71055 PD71055GB-10-3B4 IR60-207-3 PD65881GB-P03 VP15-00-3
Contextual Info: DATA SHEET MOS Integrated Circuit PD65881GB-P03 Product with functions equivalent to those of the μPD71055 parallel interface unit , using the gate array method The μ PD65881GB-P03 has an IP macro (product name: NA55A macro) included in CMOS gate array CMOS-N5,

PD71051

Abstract: IR60-207-3 PD65881GB-P02 VP15-00-3
Contextual Info: DATA SHEET MOS Integrated Circuit PD65881GB-P02 Product with functions equivalent to those of the μPD71051 serial control unit , using the gate array method The μ PD65881GB-P02 has an IP macro (product name: NA55A macro) included in CMOS gate array CMOS-N5,

vhdl code for bcd to seven segment display

Abstract: vhdl code for 8 bit bcd to seven segment display ALPHANUMERIC DISPLAY driver vhdl code for 8bit bcd to seven segment display atmel 7 segment display driver VHDL code of lcd display binary to abcd code 3021A vhdl code for lcd display vhdl code for alphanumeric display on lcd
Contextual Info: MGL-based IP Core: Alphanumeric Display Driver Features • Alphanumeric Display Macro • Easy to Implement on AT94K FPGA • Display on Alphanumeric Display of the ATSTK94 Starter Kit Introduction This alphanumeric display macro is implemented by a 4-input Look-UP Table LUT

C PREPROCESSOR

Abstract: ADSP-21000 limit.h
Contextual Info: G21K C Preprocessor Reference 8.1 8 INTRODUCTION The C preprocessor is a macro processor that is used automatically by the C compiler to transform your program before actual compilation. It is called a macro processor because it allows you to define macros, which are brief

1N79

Abstract: 1N60 1N63 1N66 APA075 Actel APA075 stapl
Contextual Info: Application Note AC227 How To Use UJTAG Introduction UJTAG is an embedded macro for the ProASICPLUS and ProASIC3 device families. It is implemented in unused I/O tiles and used as the interface between external JTAG ports and internal logic. This macro can

adsp-210XX

Abstract: mrf 174 RMS-2 ADSP-21020 ADSP-21060 ADSP-21061 ADSP-21062
Contextual Info: I INDEX C/assembly interface See Mixed C/assembly programming -21062 (ADSP-21062 macro) compiler switch 2-45 Symbols @ filename (command file) compiler switch 2-44 _asm_ keyword 2-45 _dm_ keyword 2-45 _inline_ keyword 2-45 _pm_ keyword 2-45 _STDC_ macro 2-45

IC-1920

Abstract: PD71054 uPD71054 PD71054GB IR60-207-3 uPD71054GB-10-3B4 VP15-00-3 71054 PD71054GB-10-3B4 PD71055
Contextual Info: DATA SHEET MOS Integrated Circuit PD65881GB-P01 Product with functions equivalent to those of the μPD71054 programmable timer/counter , using the gate array method The μ PD65881GB-P01 has an IP macro (product name: NA54A macro) included in CMOS gate array CMOS-N5,

C18 libraries

Abstract: mplab c18 libraries c018i c018 F020 PIC17C756 PIC18C452 PIC18F020 mplab c18 library MPLAB IDE Quick Chart
Contextual Info: MPLAB C1X Quick Reference Card 34 MPLAB C17 Quick Reference MPLAB C17 Command Switches Command Description /?, /h Display help screen /D<macro>[=<text>] Define a macro /FO=<name> Set object file name /FE=<name> Set error file name /I<path> Add include path