M625771 Search Results

Contextual Info: PRELIMINARY IDT70V24S/L HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. • M/S = H for BUSY output flag on Master M/S = L for BUSY input on Slave • Interrupt Flag • Devices are capable of withstanding greater than 2001V

Contextual Info: bôE J> m 4Û25771 GG13bai B34 « I D T CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS IDT72413 INTEGRATED DEVICE FEATURES: DESCRIPTION: • • • The IDT72413 is a 64 x 5, high-speed First-In/First-Out FIFO that loads and empties data on a first-in-first-out basis.

Contextual Info: 3.3V 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 ADVANCE INFORMATION Integrated D evice Technology, Inc. FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns

Contextual Info: PRELIMINARY IDT7M4084 2M X 8 CMOS STATIC RAM MODULE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • High-density 16 m egabit 2M x 8 Static RAM module Equivalent to the JE D E C standard for future monolithic Fast access time: 55ns (m ax.)

0B2M

Contextual Info: INTEGRATED DEVICE ^flE j _ 4025771 0014115 101 M I D T I PRELIMINARY IDT70261S/L HIGH-SPEED 16Kx 16 DUAL-PORT STATIC RAM Integrated Device Technology, Inc • FEATURES: • • • • • True Dual-Ported m em ory cells w hich allow sim ulta­ neous reads of the sam e m em ory location

Contextual Info: 3.3V LOW SKEW PLL-BASED IDT74FCT3932 CMOS CLOCK DRIVER ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: • 0.5 M ICRO N CM O S Technology • Guaranteed low skew • 1 6 programmable frequency configurations • 17 3-state outputs • Output configuration:

Contextual Info: FAST CMOS OCTAL BUFFER/LINE DRIVERS In te g ra te d D e v ic e T e c h n o lo g y , In c . IDT54/74FCT240/2240T/AT/CT/DT IDT54/74FCT241/2241T/AT/CT/DT IDT54/74FCT244/2244T/AT/CT/DT IDT54/74FCT540T/AT/CT IDT54/74FCT541/2541T/AT/CT FEATURES: DESCRIPTION: • Common features:

Contextual Info: Integrated Device Technology, Inc. HIGH-SPEED 64K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH SEMAPHORE CONTROLS ADVANCED 1DT70728S/L FEATURES: DESCRIPTION: • 64K x 16 Bank-Switchable Dual-Ported SRA Architecture - Eight independent 8K x 16 banks -1 Megabit of memory on chip

71256L25

Abstract: DIN 3968 71256L35
Contextual Info: INTEGRATED DEVICE SflE D 4ÖSS771 G01177S 037 • IDT VERY LOW POWER CMOS SRAM FOR NOTEBOOK/LAPTOP CACHE 256K 32K x 8-BIT IDT71256SL IDT71256L Integrated Device Technology, Inc. 3» FEATURES: • Optimized for 16/32bit notebook/laptop cache at 20 and 25MHz

27611

Abstract: n3939 qo01 1-G631 g631
Contextual Info: M7E D I N T E G R A T E D DE VI CE 9 4 Ö 2 S 7 7 1 G O O ^ S b b 2 Hi IDT CMOS PARALLEL SyncFlFO CLOCKED FIFO 512 x 18-BIT & 1024 x 18-BIT FEATURES • • • • • • • • • 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write cycle time

Contextual Info: 3ÖE D INTEGRATED DEVICE • MÖ25771 G0DÖ1S3 S ■ IDT NOTICE SEE ORDER OF DATA FOR - H ERRATA CMOS STATIC RAM 256K 64K x 4-BIT FEATURES: 4 - 2 . 3 - l ò IN F O R M A T IO N _ ADVANCED INFORMATION IDT61298 DESCRIPTION: • Fast Output Enable (O E ) pin available for added system

l6961

Contextual Info: INTEGRATED DEVICE b ôE ]> 4025771 m □□14 13 7 sqj * I D T IDT7025S/L HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM Integrated Device Technology, In c FEATURES: • • • • • • True D ual-Ported m em ory cells w hich allow s im ulta­ neous reads of the sam e m em ory location

Contextual Info: bflE D • HÖ25771 G 0 1 4 3 3 Û EQfi m i D T I N T E G R A T E D E V I C E _ HIGH-SPEED 3.3V 32K X 8 DUAL-PORT STATIC RAM 1df PRELIMINARY IDT70V07S/L Integrated Di svtce Technology, Inc FEATURES: • • • True D ual-P orted m em ory cells which allow sim ulta­

Contextual Info: PHY TC-PMD for 25.6 Mbps ATM Networks PRELIMINARY IDT77105 Integrated Device Technology, Inc. FEATURES DESCRIPTION • Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for 25.6 Mpbs ATM Networks • UTOPIA Level 1 Interface