T3932 Search Results

q515

Abstract: 167333
Contextual Info: 3.3V LOW SKEW PLL-BASED T3932 CMOS CLOCK DRIVER ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: th e d e la y in th e fe e d b a c k path. In o rd e r to offset a n y d e la y in • 0 .5 M IC R O N C M O S T e c h n o lo g y th e output path from th e F C T 3 9 3 2 ou tput to a receivin g device,

Contextual Info: 3.3V LOW SKEW PLL-BASED T3932 CMOS CLOCK DRIVER ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: • 0.5 M ICRO N CM O S Technology • Guaranteed low skew • 1 6 programmable frequency configurations • 17 3-state outputs • Output configuration:

fdk vco

Abstract: vco fdk
Contextual Info: T3932 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • path delay should be made to match this output path delay. The PLL consists of the phase/frequency detector, charge