LCC 16 PIN PACKAGE Search Results

Contextual Info: Commercial INC. TM PA7140 PEEL Array Programmable Electrically Erasable Logic Array Features I High-Speed, Moderate Power Consumption • CMOS Electrically Erasable Technology - As fast as 13ns/20ns tpdi/tpd , 58.5MHz fmax - ICC 150mA max, 100mA typical - Reprogrammable in 40-pin DIP and

Contextual Info: PA7024 INC. PA7024 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology High-Speed Commercial and Industrial Versions - As fast as 10ns/15ns tpdi/tpdx , 7 1 ,4M Hz (fMAX) - Industrial grade available for 4.5 to 5.5V Vcc

CY7C281A

Abstract: CY7C282A CERPACK K73 CY7C281A-45JC
Contextual Info: 1CY 7C28 2A CY7C281A CY7C282A 1K x 8 PROM Features tical, but are packaged in 300-mil and 600-mil-wide packages respectively. The CY7C281A is also available in a 28-pin leadless chip carrier. The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming algorithms.

Contextual Info: IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER Integrated Device Technology, Inc. FEATURES: > 200V using machine model C = 200pF, R = 0 • Available in DIP, SOIC, SSOP, QSOP, Cerpack and LCC packages • Military product compliant to MIL-STD-883, Class B

CXA1386

Abstract: HI1386 HI1386AIL HI1386JCP
Contextual Info: CT T O D U C EM E N t R P E A ra T L e nt e OL E R EP OBS ENDED upport C om/tsc M S il.c COM chnical w.inters E R e NO ur T L or w w I act o cont -INTERS 8 8 1-8 8-Bit, 75 MSPS, Flash A/D Converter March 2003 Features • • • • Differential Linearity Error ±0.5 LSB or Less

Contextual Info: 82C 86H /883 f!i HARRIS CMOS Octal Bus Transceiver Ju n e 1989 P ino u ts Features 82C 86H /883 CERAMIC DIP TOP VIEW • This Circuit is Processed in Accordance to M il-S td -8 8 3 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. • Full Eight Bit Bi-directional Bus Interface

fast page mode dram controller

Abstract: MT4C4001J
Contextual Info: MT4C4001J 883C 1 MEG x 4 DRAM AUSTIN SEMICONDUCTOR, INC. DRAM 1 MEG x 4 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • SMD 5962-90847 • MIL-STD-883 FEATURES • Industry standard x4 pinout, timing, functions and packages

Contextual Info: * /1 T e x a s In s t r u m e n t s LMK00301 3-GHz 10-0utput Differential Clock Buffer/Level Translator 1.0 General Description B Servers, Workstations, and Computing TheLMK00301 isa3-G H z, 10-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution

6116 CMOS RAM

Contextual Info: CMOS STATIC RAM 16K 2Kx 8-BIT IDT6116SA IDT6116LA Integrated Devicelechnol03y Inc FEATURES: DESCRIPTION: • T h e ID T6116S A /LA is a 16,384-bit h ig h -s p e e d s ta tic RAM or­ g an ize d as 2K x 8. It is fa b rica te d u sin g ID T ’s h igh-perform ance,

Contextual Info: FEATURES: DESCRIPTION: • The ID T54/74FC T138 and ID T54 /7 4 F C T 1 38 A a re 1-of-8 d e c o d ­ ers b u ilt u sin g a d v a n c e d C E M O S , a d u a l m etal C M O S te ch n o l­ o g y. T h e ID T54/74FC T138 a n d ID T54/74FC T138A a c c e p t three bi­

Contextual Info: a Harris H A -5114/883 Low Noise, High Performance Operational Amplifier January 1989 Features Description • This Circuit Is Processed in Accordance to M ll-S td - Low noise and high performance are key words describing the quad, uncompensated HA-5114/883. This general

SC1006

Contextual Info: CMOS STATIC RAM 256K 64K x 4-BIT PRELIMINARY IDT61298SA Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 64K x 4 high-speed static RAM • Fast Output Enable (O E) pin available for added system flexibility • High speed (equal access and cycle times)

PLCC44 pinout

Abstract: PLCC44 M28F102 A534
Contextual Info: M28F102 1 Mbit 64Kb x16, Bulk Erase Flash Memory DATA BRIEFING 5V ±10% SUPPLY VOLTAGE 12V PROGRAMMING VOLTAGE FAST ACCESS TIME: 90ns BYTE PROGRAMMING TIME: 10µs typical ELECTRICAL CHIP ERASE in 1s RANGE LOW POWER CONSUMPTION – Stand-by Current: 5µA typical

Contextual Info: s> » Â K DMFÛfôlMÂYOÛM in te i 8XC51FB EVENT-CONTROL CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 16K BYTES USER PROGRAMMABLE EPROM Automotive High Performance CHMOS EPROM 32 Programmable I/O Lines Three 16-Bit Timer/Counters — Timer 2 Up/Down Counter

62C256

Contextual Info: IS 62C256 ISSI - JïOv* 32K X 8 LOW POWER CMOS STATIC RAM PRELIMINARY OCTOBER 1990 FEATURES DESCRIPTION • Fast Access Time: 8 0 ,1 0 0 ,120ns max. • Low Power Dissipation Standby (CMOS): 10nW(typ.) Operating: 250mW (max.) The ISSI IS62C256 is a high speed, low power, 32,768-word

Contextual Info: Integrated Device Technology, Inc. ADVANCE INFORMATION IDT54/74FBT240 IDT54/74FBT240A IDT54/74FBT240C HIGH-SPEED BiCMOS OCTAL BUFFER/LINE DRIVER FEATURES: DESCRIPTION: • IDT54/74FBT240 equivalent to 54/74BCT240 The FBT series of BiCMOS Octal Buffers and Line Drivers

0X00

Abstract: IEEE1284 OX9162
Contextual Info: FEATURE • • • 8 bit pass-through local bus IEEE1284 SPP/EPP/ECP parallel port Single function target PCI controller, fully PCI 2.2 and PCI Power Management 1.0 compliant OX9162 Integrated Parallel Port/Local Bus and PCI interface • • • • 2 multi-purpose IO pins which can be configured as

Contextual Info: J t Û Te x a s * In s t r u m e n t s LMK00304 3-GHz 4-Output Differential Clock Buffer/Level Translator 1.0 General Description B Servers, Workstations, and Computing The LMK00304 is a 3-GHz 4-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution

Contextual Info: FAST CMOS BUFFER/CLOCK DRIVER IDT49FCT805BT/CT IDT49FCT806BT/CT Integrated Device Technology, Inc. FEATURES: Military product compliant to M IL-STD-883, Class B 0.5 M ICRO N C M O S Technology Guaranteed low skew < 500ps max. DESCRIPTION: Very low duty cycle distortion < 600ps (max.)

communication between cpu and iop

Abstract: 8089 microprocessor architecture
Contextual Info: ^ S Ü G IM M V M8089 8 & 16-BIT HMOS I/O PROCESSOR Military • High Speed DMA Capabilities Including I/O to Memory, Memory to I/O, Memory to Memory, and I/O to I/O ■ 1 Mbyte Addressability ■ MIAPX 86, 68 Compatible: Removes I/O Overhead from CPU in MiAPX 86/11 or

Contextual Info: FAST CM O S OCTAL BUFFER/LINE DRIVER ID T54/74FC T240/A FEATURES: DESCRIPTION: • The ID T54/74FC T240/A are octa l b u ffe r/lin e d rive rs b u ilt using a d va n ce d C E M O S , a d ua l m etal C M O S te c h n o lo g y . T h e devices are d e s ig n e d to be e m p lo y e d as m e m ory a n d a ddress drivers,

Contextual Info: IDT54/74FCT139T/AT/CT FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • The ID T54/74FC T139T/A T/C T are dual 1-of-4 decoders built using an advanced dual metal CM O S technology. These devices have two independent decoders, each of which

2kx8 eeprom

Contextual Info: FT28C16 Parallel EEPROM 16K 2Kx8 Features • Fast Read Access Time - 150 ns • Fast Byte Write - 200 µs or 1 ms • Self-Timed Byte Write Cycle • • • • • • • –Internal Address and Data Latches –Internal Control Timer –Automatic Clear Before Write

Contextual Info: :S 8"N æ> I\dt FAST CMOS 8-INPUT UNIVERSAL SHIFTREGISTER IDT54/74FCT299T/AT/CT Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • The IDT54/74FCT299T/AT/CT are built using an advanced dual metal CMOS technology. The IDT54/74FCT299T/AT/