KM48S16030 Search Results

Contextual Info: shrink-TSOP KM48S16030BN Preliminary CMOS SDRAM 128Mb SDRAM Shrink TSOP 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 July 1999 Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.0 July 1999 shrink-TSOP

54PIN

Abstract: KM48S16030
Contextual Info: Preliminary CMOS SDRAM KM48S16030 4M x 8Bit x 4 Banks Synchronous DRAM FEATURES GENERAL DESCRIPTION • JEDEC standard 3.3V power supply The KM48S16030 is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the

KM48S16030A

Contextual Info: KM48S16030A CMOS SDRAM 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.1 June 1999 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.1 Jun. 1999 KM48S16030A CMOS SDRAM Revision History Revision 0.0 May 15, 1999

KMM390S3320BT1-GA

Abstract: 16MX8 32MX72 KMM390S1723BT1-GA samsung memory
Contextual Info: SERIAL PRESENCE DETECT PC133 Registered DIMM PC133 Registered SDRAM DIMM 168pin Type SPD Specification REV. 0 Aug. 1999 REV. 0 Aug. 1999 SERIAL PRESENCE DETECT PC133 Registered DIMM KMM390S1723BT1-GA •Organization : 16MX72 •Composition : 16MX8 * 9ea •Used component part # : KM48S16030BT-GA

48S160

Abstract: 48S1603
Contextual Info: Preliminary KM48S16030 CMOS SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM FEATURES GENERAL DESCRIPTION • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address The KM48S16030 is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits,

Contextual Info: KM48S16030B CMOS SDRAM 128Mbit SDRAM 4M X 8Bit X 4 Banks Synchronous DRAM LVTTL Revision 0.1 June 1999 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.1 Jun. 1999 ELECTRONICS KM48S16030B CMOS SDRAM R evision H istory

KM48S16030B

Contextual Info: KM48S16030B CMOS SDRAM 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.1 June 1999 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.1 Jun. 1999 KM48S16030B CMOS SDRAM Revision History Revision 0.0 May 15, 1999

Contextual Info: Preliminary CMOS SDRAM KM48S16030 4M X 8Bit X 4 Banks Synchronous DRAM GENERAL DESCRIPTION FEATURES The KM 48S16030 is 134,217,728 bits synchronous high data • JEDEC standard 3.3V pow er supply • LVTTL com patible with m ultiplexed address rate Dynam ic RAM organized as 4 x 4,194,304 w ords by 8 bits,

Contextual Info: KM48S16030A CMOS SDRAM 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 May 1999 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.0 May. 1999 KM48S16030A CMOS SDRAM Revision History Revision 0.0 May 15, 1999

CDC2509

Contextual Info: KMM377S1723T3 PC100 Registered DIMM Revision History Revision 0.1 Mar. 23, 1999 - Corrected misprinted Part No.From KMM377S1723T3 to KMM377S1723T3 and From KM48S16030CT KM48S16030T @Simplified Truth Table Read and Write Column Address was revised from A0~A8 to A0~A9.

KM48S16030

Contextual Info: Preliminary CMOS SDRAM KM48S16030 4M x 8Bit x 4 Banks Synchronous DRAM FEATURES GENERAL DESCRIPTION • JEDEC standard 3.3V power supply The KM48S16030 is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the

KMM377S1723T3-GH

Abstract: KMM377S1723T3-GL CDC2509
Contextual Info: SDRAM MODULE KMM377S1723T3 Revision History [Rev. 1] March 23, 1999 Corrected misprinted Part No. From KMM377S1723T3 to KMM377S1723T3 and From KM48S16030CT to KM48S16030T. @Simplified Truth Table Read and Write Column Address was revised from A0~A8 to A0~A9.

TC5118160

Abstract: msm-561 TMS444000 msm561 M5M418165 M5M418160 tms44c256 TC5117405 HY514264 HY514260
Contextual Info: New Page 1 DRAM 1Meg 1Mx1 256Kx4 FPM FPM Fujitsu MB81C100 MB81C4256 Goldstar GM71C100 GM71C4256 Hitachi HM511000 HM514256 Hyundai HY531000 HY534256 Micron MT4C1024 MT4C4256 Mitsubishi M5M41000 M5M44256 Nec UPD421000 UPD424256 Oki MSM511000 MSM514256 Samsung alt KM41C1000 KM44C256

Contextual Info: Preliminary KMM466S1723T2_144pin SDRAM SODIMM KMM466S1723T SDRAM SODIMM 16Mx64 SDRAM SODIMM based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM466S1723T is a 16M bit x 64 Synchronous

KMM374S3323T-G8

Abstract: KMM374S3323T-GH KMM374S3323T-GL
Contextual Info: PC100 SDRAM MODULE KMM374S3323T Revision History [ Rev. 1 ] March 23. 1999 Package dimension and Block Diagram changed. Rev.1 Mar. 1999 PC100 SDRAM MODULE KMM374S3323T KMM374S3323T SDRAM DIMM 32Mx72 SDRAM DIMM with ECC based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD

Contextual Info: Preliminary 144pirt SDRAM SODIMM KMM466S1723T2 KMM466S1723T SDRAM SODIMM 16Mx64 SDRAM SODIMM based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SP GENERAL DESCRIPTION FEATURE The Samsung KMM466S1723T is a 16M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung

Contextual Info: SDRAM MODULE Preliminary KMM377S1723T1 Revision History Revision 3 May 1998 - CLK Input Cap. is added by PLL Input Cap. (24pF) REV. 3 May '98 ELECTRONICS Preliminary KMM377S1723T1 SDRAM MODULE KMM377S1723T1 SDRAM DIMM (Intel 1.0 ver. Base) 16Mx72 SDRAM DIMM with PLL & Register based on 16Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD

KMM374S1723T-G8

Abstract: KMM374S1723T-GH KMM374S1723T-GL
Contextual Info: KMM374S1723T PC100 SDRAM MODULE Revision History Revision .0 Aug. 1998 - Eliminated Preliminary REV. 0 Aug. 1998 KMM374S1723T PC100 SDRAM MODULE KMM374S1723T SDRAM DIMM 16Mx72 SDRAM DIMM with ECC based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD

KMM374S3323T-G8

Abstract: KMM374S3323T-GH KMM374S3323T-GL
Contextual Info: KMM374S3323T PC100 SDRAM MODULE Revision History Revision .0 Aug. 1998 - Eliminated Preliminary REV. 0 Aug. 1998 KMM374S3323T PC100 SDRAM MODULE KMM374S3323T SDRAM DIMM 32Mx72 SDRAM DIMM with ECC based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD

Contextual Info: Preliminary PC66 SDRAM MODULE KMM366S1723TL KMM366S1723TL SDRAM DIMM 16Mx64 SDRAM DIMM based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM366S1723TL is a 16M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung KMM366S1723TL consists of eight CMOS 16M x 8 bit with

KMM366S3323T-G8

Abstract: KMM366S3323T-GH KMM366S3323T-GL
Contextual Info: PC100 SDRAM MODULE KMM366S3323T Revision History [ Rev. 1 ] March 23. 1999 Package dimension changed. Rev.1 Mar. 1999 PC100 SDRAM MODULE KMM366S3323T KMM366S3323T SDRAM DIMM 32Mx64 SDRAM DIMM based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD

KMM366S1723BTS-GA

Contextual Info: KMM366S1723BTS PC133 Unbuffered DIMM Revision History Revision 0.0 Aug., 1999 • PC133 first published. REV. 0 Aug. 1999 KMM366S1723BTS PC133 Unbuffered DIMM KMM366S1723BTS SDRAM DIMM 16Mx64 SDRAM DIMM based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD

Contextual Info: KMM374S1723BTS PC133 Unbuffered DIMM Revision History Revision 0.0 Aug, 1999 • PC133 first published. REV. 0 Aug. 1999 KMM374S1723BTS PC133 Unbuffered DIMM KMM374S1723BTS SDRAM DIMM 16Mx72 SDRAM DIMM with ECC based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD

Contextual Info: PC100 Unbuffered DIMM KMM366S3323AT Revision History Revision 0.0 June 7, 1999 • Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER. • Skip ICC4 value of CL=2 in DC characteristics in datasheet. • Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER.