IOR 10 DC 1R Search Results

T3D 34 diode

Abstract: 82440LX Diode T3D 57 t57b T27b t59b T31C Transistor t59c ISA BUS spec t119
Contextual Info: E DATASHEET ADDENDUM 82371AB PIIX4 PCI ISA IDE Xcelerator Timing Specifications September 1997 Order Number: 290548-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions

16C550

Contextual Info: 2 Ë* E X A R XR-16C550 Universal Asynchronous Receiver /Transmitter with FIFOs GENERAL DESCRIPTION PIN ASSIGNMENT The X R -16C 550 is a un ive rsa l asynchronous receiver and transmitter with an on-chip FIFO and modem control signal com patibility. An internal

16C550CQ

Abstract: ST16C550CP40 lm 398- SAMPLE AND HOLD
Contextual Info: ^ STARTECH ST16C550 Printed September 6,1994 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C550 is a universal asynchronous receiver and transm itter with 16 byte transmit and receive FIFO. A programmable baud rate generator is pro­

Contextual Info: STARTECH ST16C450 An Printed June 19, 1996 Company UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC RI* CD* DSR* CTS* 5 4 3 2 1 44 43 42 41 40 D5 7 39 RESET D6 8 38 OP1* D7 9 37 DTR* RCLK 10 36 RTS* RX 11 35 OP2* N.C. 12 34 N.C.

Contextual Info: STARTECH ST16C550 An Printed June 19, 1996 Company UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC RI* CD* DSR* CTS* 5 4 3 2 1 44 43 42 41 40 D5 7 39 RESET D6 8 38 OP1* D7 9 37 DTR* RCLK 10 36 RTS* RX 11 35 OP2* N.C.

T20D

Abstract: 6450-RX-1 Code T6S NS16C550 T11D TL16C550 st16c550cp T28D ST16C550CP40 ST16C550IP40
Contextual Info: ST16C550 STARTECH An Company Printed December 17, 1996 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC RI* CD* DSR* CTS* 5 4 3 2 1 44 43 42 41 40 D5 7 39 RESET D6 8 38 OP1* D7 9 37 DTR* RCLK 10 36 RTS* RX 11 35 OP2*

ST16C1450

Contextual Info: ST16C1450 ST16C1451 STARTECH An Printed June 19, 1996 Company UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER D0 26 DSR* D1 1 27 CD* D2 2 28 VCC D3 3 23 DTR* D7 8 22 RTS* RX 9 21 A0 TX 10 20 A1 CS* 11 19 A2 17 RI* INT 18 16 14 IOW* IOR* 13 GND 15 12 ST16C1450CJ28

Diode SMD ED 9C

Abstract: FN240 p-channel 250V 30A power mosfet P-CHANNEL 400V 15A i428
Contextual Info: IQR IRFN Series Devices IRFN Series Data Sheet alph abetical order. W h e re the inform ation is d evice specific, w e h ave assig n ed a n um eric c h a ra cte r for the graph type and an alph a c h a ra c te r to a given device. S e e T a b le A b elo w . W h e re graphs are

VL16C450

Abstract: NS16450 NS16C450 ST16C450 ST16C450CJ44 ST16C450CP40 ST16C450CQ48 WD16C450 10 35L cd
Contextual Info: ^ STARTECH An ST16C450 EJMRCompany Printed August 3, 1995 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER DESCRIPTION PLCC Package The ST16C450 is a universal asynchronous receiver and transmitter. A programmable baud rate genera­ tor is provided to select transmit and receive clock

IC 16c550

Contextual Info: XR-16C550 2 £ * E X 4 R Universal Asynchronous Receiver/Transmitter with FIFOs GENERAL DESCRIPTION PIN ASSIGNMENT DO ] T h e X R -1 6 C 5 5 0 is a u n iv e rs a l a s y n c h ro n o u s receiver and transm itter with an on-chip FIFO and m odem c o n tro l signal co m p a tib ility. An internal

Contextual Info: ^ STARTECH ST16C450 An 36* E3MRCompany Printed August 3, 1995 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER DESCRIPTION PLCC Package The ST16C450 is a universal asynchronous receiver and transmitter. A programmable baud rate genera­ tor is provided to select transmit and receive clock

A13L

Abstract: A15L CYD04S72V CYD09S72V CYD18S72V A0LA IOR 10 dc 1r
Contextual Info: CYD04S72V CYD09S72V CYD18S72V PRELIMINARY FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM Features Functional Description • True dual-ported memory cells that allow simultaneous access of the same memory location • Synchronous pipelined operation

16c550

Abstract: 16c550cj XR-16C550CJ XR16C550CJ IOR50 XR-16C550CP VL16C550 Baud Rate Generator programming table XR-16C550 16C550CP
Contextual Info: EXAR CORP SDE D • 34521,16 D D O b O M D S 3 D « E X R XR-16C550 IT E X A R T- 3 7 -0 5 ' Universal Asynchronous Receiver / Transmitter with FIFOs PIN ASSIGNMENT GENERAL DESCRIPTION » [T Dl PT oafT «Q 04^ -Q o.Q 07fT T h e X R -1 6 C 5 5 0 is a u n iv e rs a l a s y n c h ro n o u s

MOSFET ior 144

Abstract: IRFM044 IRFM044D
Contextual Info: Data Sheet No. PD-9.708A INTERNATIONAL RECTIFIER IO R AVALANCHE ENERGY RATED AND dv/dt RATED HEXFET TRANSISTOR IRFMQ44 N-CHANNEL 60 Volt, 0.040 Ohm HEXFET Product Summary The HEXFET® technology is the key to International Rectifier's advanced line of power MOSFET transistors.

mcr 12m

Contextual Info: ST16C2450 STARTECH An Company Printed June 19, 1996 DUAL UNIVERSAL ASYNCHRONOUSRECEIVER/TRANSMITTER DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC RIA* CDA* DSRA* CTSA* 5 4 3 2 1 44 43 42 41 40 D5 7 39 RESET D6 8 38 DTRB* D7 9 37 DTRA* RXB 10 36 RTSA* RXA 11 35 OPA*

16C452

Abstract: VL16C452 16C452CJ Baud Rate Generator programming table XR-16C452CJ
Contextual Info: XR-16C452 ¿ 'E X A R Dual U n iversal A syn ch ro n o u s R eceiver and T ran s m itte r w ith Parallel Printer Port PIN ASSIGNMENT GENERAL DESCRIPTION The XR-16C452 is a dual universal asynchronous re ce ive r and tra n s m itte r w ith a b id ire c tio n a l

82C924

Abstract: opl5 opti 929 OPL2 AD1848 MPU-401 SA10 SA11 SA 6356 SD227
Contextual Info: M e d ia C H IP S 82C924 16-Bit Sound Controller Data Book R evision 1.0 912-3000-031 May, 1995 ‘i O O m T b 00 0 1 4 4 4 2^4 Copyright Copyright 1995, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored

Contextual Info: ST16C2550 STARTECH An Company Printed June 19, 1996 DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs D4 D3 D2 D1 D0 TXRDYA* VCC RIA* CDA* DSRA* CTSA* 4 3 2 1 44 43 42 41 40 D5 7 39 RESET D6 8 38 DTRB* D7 9 37 DTRA* RXB 10 36 RTSA* RXA 11 35 OPA* TXRDYB* 12

Contextual Info: ST16C550 STARTECH An JK* E X flR C om p an y Printed December 17, 1996 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C550 is a universal asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. A programmable baud rate generator is pro­

bosh 7.4.9

Abstract: atn 219 sdb7
Contextual Info: Section 7 Electrical Characteristics 7.1 Absolute Maximum Ratings Symbol o< o Item Supply voltage Value Unit -0 .3 to +7.0 V Input voltage V,N —0.3 to Operating temperature "l"opr Regular Spec. -2 0 to +75 Storage temperature T"stg -5 5 t o +125 + 0.3 °C

Contextual Info: WD76C30/L V DESCRIPTION 1.0 DESCRIPTION 1.1 WD76C30/LV FEATURES 1.2 • Two fully programmable and independent serial I/O ports configurable as PC/AT compatible WD16C452 or PS/2 compatible (WD16C552) ° Loopback controls for communications link fault isolation for each ACE

st16c454

Contextual Info: STARTECH ST16C454 An Printed June 19, 1996 Company QUAD ASYNCHRONOUS RECEIVER AND TRANSMITTER DESCRIPTION PLCC PLCC Rev. 2.0 RIA* RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD RID* CDD* 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DSRD* 59 CTSD* DTRA* 12 58 DTRD*

16C450CQ

Contextual Info: ST16C450 J2 T E X A R HIGH SPEED SINGLE UART Printed May 23,1997 GENERAL DESCRIPTION 44 Pin PLCC Package The ST16C450 is a universal asynchronous receiver and transmitter. A programmable baud rate generator is provided to select transmit and receive clock rates

intel 8355

Contextual Info: HS-83C55RH HARRIS S E M I C O N D U C T O R Radiation Hardened 16K B it CMOS ROM September 1997 Pinout Features • Radiation Hardened EPI-CMOS - Total Dose 1 x 1 0 5 RAD Si - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s