RT3PE600L
Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging
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mil-std-883rt3pe600lrt3pe3000laes-128+3pac10lg484proasicplus flash family fpgas advanced v0.1
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A3PE1500
Abstract: A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1
Contextual Info: ProASIC3E Packaging 3 – Package Pin Assignments 208-Pin PQFP 1 208 208-Pin PQFP Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .
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208-pina3pe600io112pdb6v1io85npb5v0+10a3pe1500a3pe3000io23pdb0v2io23ndb0v2io30pdb1v1io05pdb0v0io06pdb0v1io32pdb1v1io10pdb0v1io283pdb7v1
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A3PE3000L FG484
Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Contextual Info: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for
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130-nma3pe3000l fg484actel pdf on radio emittera3pe3000l+6fg144fg256fg324fg484pq208tdp 245 y
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AFS600-FG256
Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator
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130-nm128-bitafs600-fg256zo 103 ma 75 607+8a54 zenerflashpro3 schematicmark at0unipolar pc atx 400 p4 power supply diagramzener diode b23pq208qn108qn180
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729-Pin
Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Contextual Info: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at
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180-pinax125io32nb3f3io59nb5f5+7729-pinaxcelerator fpgasio126pb3f11ag18fbga 896896-pinaxcelerator family fpgas
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AES-128
Abstract: FG256 FG484
Contextual Info: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
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A54 ZENER
Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents
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128-bit130-nma54 zenerafs600-fg256+4mark at0qn108core8051bipolar rom
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ARMv6
Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
Contextual Info: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
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130-nmarmv6cortex a15 corecortex-m1+6cortex r4transistor ww1aes-128fg256fg484t8 851
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a51 ZENER DIODE
Abstract: transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060
Contextual Info: Revision 3 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •
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130-nm128-bita51 zener diodetransistor 2n2222+4bipolar romequivalences transistor listproasic3 lvdsyl 1060
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Schematic
Abstract: DLP-2232H-SF
Contextual Info: DLP-2232H-SF LEAD FREE USB - MICRONTROLLER - FPGA MODULE FEATURES: • • • • • • • • • • Microsemi/Actel SmartFusion Customizable System-on-Chip cSoC FPGA Internal 100MHz, 32-Bit ARM Cortex™-M3 Microcontroller Subsystem (MSS) Internal 100MHz RC Oscillator-1% Accurate
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dlp-2232h-sf100mhz32-bit256kbytes+664kbytes64-mbit50mhz8/10/12-bit600kspsschematic
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AES-128
Abstract: FG256 FG484 ARMv6
Contextual Info: Revision 8 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze
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RT3PE3000
Abstract: RT3PE600L RT3PE3000L CCGA AES-128 PAC10 IO72NDB4V0
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging
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mil-std-883rt3pe3000rt3pe600lrt3pe3000l+4ccgaaes-128pac10io72ndb4v0
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A3PE600
Contextual Info: v1.0 ProASIC3E Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 600 k to 3 Million System Gates • 108 to 504 kbits of True Dual-Port SRAM • Up to 620 User I/Os Reprogrammable Flash Technology • • • •
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LGA 478 SOCKET PIN LAYOUT
Abstract: RTAX2000
Contextual Info: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg
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A3PE3000L
Abstract: A3PE600L
Contextual Info: v1.0 Military ProASIC 3/EL Low-Power Flash FPGAs ® with Flash*Freeze Technology Advanced and Pro Professional I/Os†† Features and Benefits Military Temperature Tested and Qualified • Each Device Tested from –55°C to 125°C Firm-Error Immune •
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a3pe3000la3pe600l |
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RD-172
Abstract: M6 transistor gaa 716 IO127NDB7V1 IO32PDB1V1 flashpro3 equivalent ZO 607 A3PE600
Contextual Info: v2.0 ProASIC 3E Flash Family FPGAs ® with Optional Soft ARM® Support Features and Benefits Pro Professional I/O High Capacity • • • 600 k to 3 Million System Gates 108 to 504 kbits of True Dual-Port SRAM Up to 616 User I/Os Reprogrammable Flash Technology
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130-nm64-bit128-bitrd-172+7m6 transistorgaa 716io127ndb7v1io32pdb1v1flashpro3equivalent zo 607a3pe600
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RTAX2000
Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
Contextual Info: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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tm1019rtax2000footprint cqfp 280rtax1000s+1actel cqfp 84
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Contextual Info: v1.3 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
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equivalent ZO 607
Abstract: JESD 201 class 1A crystal k 1058 mosfet
Contextual Info: Advanced v0.8 Fusion Family of Mixed-Signal Flash FPGAs ® with Optional Soft ARM Support Features and Benefits Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS Process
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130-nm32-bit12-bitequivalent zo 607+2jesd 201 class 1a crystalk 1058 mosfet
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RGB444x
Contextual Info: VmodCAM Reference Manual Revision: July 19, 2011 Note: This document applies to REV C of the board. 1300 NE Henley Court, Suite 3 Pullman, WA 99163 509 334 6306 Voice | (509) 334 6300 Fax Overview The VmodCAM board provides digital imaging capabilities for any Digilent FPGA system
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mt9d112io10-pio10-nio11-p+7io11-nio13-pio13-nio14-pio14-nio15-prgb444x
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56 pin edac connector
Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
Contextual Info: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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tm101956 pin edac connectorpcb footprint cqfp 132silicon sculptor ii+1actel ccga 624 mechanical
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IO191
Abstract: vhdl code for fifo and transmitter actel FG484 package mechanical drawing
Contextual Info: ProASIC 3L Low-Power Handbook ProASIC3L Low-Power Flash Device Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – ProASICL Low-Power Datasheet
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RTAX2000
Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
Contextual Info: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg
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Contextual Info: Radiation-Tolerant ProASIC 3 Handbook Radiation-Tolerant ProASIC3 Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – Radiation-Tolerant ProASIC3 FPGAs Datasheet
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