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    ICS93V855Y Search Results

    ICS93V855Y Datasheets Context Search

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    93V855A

    Contextual Info: ICS93V855 Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Product Description/Features: • Low skew, low jitter PLL clock driver • External feedback pins for input to output synchronization


    Original
    ics93v855650ps950ps93v855ag+693v855agi93v855agit93v855aglfpgg2893v855aglft93v855a PDF

    93V855A

    Abstract: 93V855AGLF
    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950ps93v855ag+693v855agi93v855agit93v855aglfpgg2893v855aglft93v855a PDF

    93V855A

    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950ps93v855ag+693v855agi93v855agit93v855aglfpgg2893v855aglft93v855a PDF

    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950psmo-153+2ics93v855ygit783a--04/30/03 PDF

    cn17-3

    Abstract: ICS93V855 CN173
    Contextual Info: ICS93V855 Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Product Description/Features: • Low skew, low jitter PLL clock driver • External feedback pins for input to output synchronization


    Original
    ics93v855650ps950psmo-153+4ics93v855ygt0497b--06/01/04cn17-3cn173 PDF

    Contextual Info: ICS93V855 Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855650ps950psmo-153+2ics93v855y497a--04/30/03 PDF

    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950psmo-153+2ics93v855ygilf-t0783b--05/21/04 PDF

    ICS93V855I

    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950psopera40+3mo-153ics93v855ygilf-t0783c--06/01/04 PDF