ICS93V855I Search Results
ICS93V855I Datasheets (1)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| ICS93V855I | Integrated Circuit Systems | DDR Phase Lock Loop Clock Driver | Original | 65.58KB | 9 |
ICS93V855I Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
93V855A
Abstract: 93V855AGLF
|
Original |
ics93v855i650ps950ps93v855ag+6 | |
93V855AContextual Info: ICS93V855I Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps |
Original |
ics93v855i650ps950ps93v855ag+6 | |
|
Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps |
Original |
ics93v855i650ps950psmo-153+2 | |
|
Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps |
Original |
ics93v855i650ps950psmo-153+2 | |
ICS93V855IContextual Info: ICS93V855I Integrated Circuit Systems, Inc. DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps |
Original |
ics93v855i650ps950psopera40+3 |