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    93V855A

    Abstract: 93V855AGLF
    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950ps93v855ag+693v855agi93v855agit93v855aglfpgg2893v855aglft93v855a PDF

    Contextual Info: ICS93V855I Integrated Circuit Systems, Inc. Preliminary Product Preview DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Pin Configuration Switching Characteristics: • CYCLE - CYCLE jitter:<75ps • OUTPUT - OUTPUT skew: <60ps • Output Rise and Fall Time: 650ps - 950ps


    Original
    ics93v855i650ps950psmo-153+2ics93v855ygit783a--04/30/03 PDF