I622 Search Results

"network interface cards"

Abstract: DI 783
Contextual Info: „„ RELEASED SIUNI-622-MAX DATASHEET PMC-1980589 • - ■ . PM* I , I 7 IV PMC-Sierra, Inc. ISSUE 6 PM5356 SIUNI-622-MAX SA TURN USER NETWORK INTERFACE 622-MAX PM5356 S/UNI-622-MAX SATURN USER NETWORK INTERFACE (622-MAX) S/UNI- 622-MAX DATASHEET

0X00

Abstract: PM5355
Contextual Info: PM5355 S/UNI-622 DATA SHEET PMC-941027 ISSUE 3 SATURN USER NETWORK INTERFACE 622-Mb PM5355 TM S/UNI- 622 S/UNI-622 SATURN USER NETWORK INTERFACE (622-MBIT/S) STANDARD PRODUCT DATA SHEET ISSUE 3: JUNE 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

CAPACITOR 60252-1

Contextual Info: Film Capacitors – AC Capacitors Motor run capacitors Series/Type: Ordering code: B32330/B32332 – Super MotorCap , 450 V B32330/B32332 Date: Version: Jan 2012 8 Content of header bars 1 and 2 of data sheet will be automatically entered in headers and footers! Please fill in the

HM62256LP-12

Abstract: HM62256LP EDI8833LP lt 6225 HM62256lp-15 HM62256LP-8 hm62256p-15 sc 6200 EDI8833C-35 EDI8833C-45
Contextual Info: — 2 5 6 K X ¡ â £ ïc 0 m « íh £ ro TAAC max ns CMOS 4 • ■ > + V S t a t i c 7 Pf RAM ( 3 2 7 6 8 x 8 ) ÍÍ TOE max (ns) TOH rain (ns) TOD max (ns) TYfP min (ns) TDS min (ns) TDH min (ns) TWD min (ns) TWR max (ns) V[ID o r VCC (V) I DD (mA)

Contextual Info: PRELIMINARY DEVICE SPECIFICATION FEATURES GENERAL DESCRIPTION • Complies with ANSI, Bellcore, and ITU-T specifications for jitter tolerance, jitter transfer, and jitter generation • On-chip high-frequency PLLs for clock generation and clock recovery • Supports 155.52 Mbit/s OC-3 and 622.08

RTL8211E

Abstract: ISL6258A 88E1116R Marvell 88E1116R ISL6258 RTL8211 L6703 u9701 MCP79-B01 Q7055
Contextual Info: 8 6 7 2 3 4 5 1 CK APPD 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. REV SCHEM,MBP 15"MLB ZONE ECN ENG APPD DESCRIPTION OF CHANGE DATE ? ? ? ? DATE ?

APPLE A6 CHIP

Abstract: cf325 W07 sot 23 C-492-5 SMD M05 sot23 C4977 cf406 p66 apple c5297 I342
Contextual Info: 8 6 7 PDF CSA CONTENTS IMG5 17" REV E 11/01/05 SYNC MASTER DATE PDF CSA CONTENTS TABLE_TABLEOFCONTENTS_HEAD 2 System Block Diagram FINO-DD 06/20/2005 TABLE_TABLEOFCONTENTS_ITEM 3 4 Power Block Diagram FINO-PC 06/20/2005 5 Table Items FINO-M23 08/26/2005 6

Contextual Info: CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33301 Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any

P174FCT

Abstract: p174fct162 i6240
Contextual Info: f j j PER/COM PI74FCT16240T PI74FCT162240T PI74FCT162H240T Product Features: Fast CMOS 16-Bit Buffer/Line Drivers Common Features: • PI74FCT16240T, PI74FCT162240T, and PI74FCT162H240T are high-speed, low power devices with high current drive • V cc = 5 V ±10%

az06

Abstract: QZ06-20 Scans-0018014
Contextual Info: QZ06-20 Q U I C K H E A T IN G TETRODE Q U ICK R EFER EN C E D A TA Q uick heating V .H .F. pow er am plifier fo r m obile tra nsm itters. 7 0 % pow er output in less than h a lf a second. f max. V a max. pa max. Performance f Pout 175 650 25 Mc/s V W 60 65

HM62256P-15

Abstract: HM66202-12 HM62256P-12 HM62256P-8 62832 im628 1m2256 Hitachi Scans-001
Contextual Info: - 124 - 2 5 6 K 2 =& tt « SA SSI OC CMOS 'f x TAAC TCAC TOE max max ns) (ns) (ns) -7 y * S t a t i c 7 TOH TOD TWP rain max min (ns) (ns) (ns) RAM TDS min (ns) 2 8 P I N TDH TW& TWR min min max (ns) (ns) (ns) HM62256LP/FP-I5SL/LT HITACHI 0—-70 150 70

1m2256

Abstract: HM62256P15 HM62256P-15 HM62256P-12 HM62256P-8 Hitachi Scans-001 HY62C256L-15
Contextual Info: - 124 - 2 5 6 K 2 =& tt « SASSI OC CMOS 'f x -7 * y S t a t i c 7 RAM 3 2 7 6 8 x 8 ) ft ft 28PI N 6225 6 À € VIL max (V) TOH rain (ns) TOD max (ns) TWP min (ns) TDS min (ns) TDH min (ns) TW& min (ns) TWR max (ns) V D D or V C C (ns) TOE max (ns) 150

rca thyristor manual

Abstract: S1C33L01 a12b 014-698
Contextual Info: CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33301 Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any

Contextual Info: I600ERW Series 2:1 Input, 6W Ultra-Miniature DC/DC Converters Electrical Specifications Specifications typical @ +25°C, nominal input voltage & rated output current, unless otherwise noted. Specifications subject to change without notice. Key Features: Input

BT 1610

Abstract: i622
Contextual Info: PM PM7322 RCMP-800 PMC-Sierra,Inc. ATM Layer Cell Routing Control, M onitoring, and Policing 800 Mbit/ FEATURES M on olithic sin gle -chip de vice w hich handles ATM sw itch ingress VP I/V C I ad dre ss translatio n, cell appending, cell rate policing, counting, and O AM

PMC-SIO

Abstract: "network interface cards"
Contextual Info: PRELIMINARY S/UNI-622-MAX PM! P M C -Sierra, Inc. PM 53 5 6 S/UNI-622-MAX DATASHEET PMC-980589 ISSUE 4 SA TURN USER NETWORK INTER FA CE 622-MAX PM5356 mm S/UNI-622-MAX SATURN USER NETWORK INTERFACE (622-MAX) DATASHEET PRELIMINARY ISSUE 4: JANUARY 1999 PMC-Sierra, Inc.

ru 94v0 circuit

Abstract: I-6-23 edp connector CI 7004 edp 2339
Contextual Info: NOTES: 1 M A TER IA L: HOUSING M A TER IA L AND OPTIONS: 1 = NYLON 6 /6 , UL 9 4 V -2 , COLOR:N A TU R A L, W ITHO UT DRAIN HOLES 2 = NYLON 6 /6 , UL 9 4 V -0 , COLORN A TU R A L, W ITHO UT DRAIN HOLES 3 = NYLON 6 /6 , UL 9 4 V -2 , COLORN A TU R A L, WITH DRAIN HOLES

Contextual Info: HD74ALVCH162270 Preliminary 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs Description The HD74ALVCH162270 is used in applications where data must be transferred from a narrow high speed bus to a wide lower frequency bus. The device provides synchronous data exchange between the two ports.

Contextual Info: PRELIMINARY S/UNI-622-MAX PM* PA/555S PMC-Sierra, Inc. S/UNI-622-M AX DATASHEET PMC-980589 ISSUE 4 SA TURN USER NETWORK INTERFACE 822-MAX PM5356 S/UN I- 622-M AX S/UNI-622-MAX SATURN USER NETWORK INTERFACE (622-MAX) DATASHEET PRELIMINARY ISSUE 4: JANUARY 1999

capacitor 106 16K

Abstract: IDT79R3000 106 16k capacitor 16K IDT74FCT373 IS81
Contextual Info: DUAL 16K x 60 DATA/INSTRUCTION CACHE MODULE FOR IDT79R3000 CPU PRELIMINARY IDT7MB6139 Integrated Device Technology, Inc. DESCRIPTION: FEATURES: • High-speed C M O S static RAM m odule constructed to support the ID T 7 9 R 3 0 0 0 R IS C C P U as a com plete data

En 60252

Contextual Info: Film Capacitors – AC Capacitors Motor run capacitors Series/Type: Ordering code: B32330/B32332 – Super MotorCap , 420 V / 450 V B32330/B32332 Date: Version: March 2011 7 Content of header bars 1 and 2 of data sheet will be automatically entered in headers and footers! Please fill in the

E106388

Abstract: CAPACITOR 60252-1
Contextual Info: Film Capacitors – AC Capacitors Motor run capacitors Series/Type: Ordering code: B32330/B32332 – Super MotorCap , 450 V B32330/B32332 Date: Version: Jan 2012 8 Content of header bars 1 and 2 of data sheet will be automatically entered in headers and footers! Please fill in the

PD2834C

Abstract: PD2833C upd2833c ffm 5380 UPD2834C UPD2833 fl024 UPB555C PB566C 1084p
Contextual Info: N E C ELECTRONICS INC De | bH27SES D017MET PRELIMINARY * H E C ' • • 2 |~ ~/7 SPECI FI CATI ON . . 2y/^ • */*> I N EC CMOS liPO 2833C/34C. PLL - L S I n ♦ pPO 2833C 1$ a CMOS LSI for the PLL synthesizer. . The swallow counter with linearly programmable counter with Hneary'10 bit,

intel 8284 clock generator circuit diagram

Abstract: intel 8284 clock generator intel 8284 clock generator block diagram intel 8284 A clock generator intel 80286 pin diagram 8284 clock generator 8284 intel clock generator intel 80286 block diagram PIN DIAGRAM OF 80286 FE3020
Contextual Info: i« rAl\Al AY IIIIIIIIIIIIIIITHA 1 T | A T ~ \ A 'X T FE3000A AT CPU CONTROL LOGIC 100% h a rd w are and s oftw are c o m p a tib le to th e IB M PC -A T W ait State G e n e ra to r-In te rn a l or External 8 2 8 4 and 8 2 2 8 4 -c o m p a tib le C lo c k G e n e ra to r