FTW 12-1 2 Search Results

SM12GZ46

Abstract: SM12DZ46 SM12DZ46A SM12GZ46A SM12JZ46 SM12JZ46A 72-CI
Contextual Info: — SM 12 r D, G, J . Z 4 6 - K * ÍSSH O íám ft iVi, ¿* ^ M 1“J ' - *Í" L *Cfe ¡ÍFL^m» 0 TO-220 • f lïB IS # # TT-5 13- I O F 1A M ftW W tt ! Tú = 25°C ! 12A ~n T fftf* "Su_L‘.-Pr^+■li! (1500V. ACi -y iHd Id r m Vt m .Id ?• SM12DZ46

Contextual Info: U 6 3 1 H 1 6 Available in Q2/97 S o ftw a re C ontrolled 2 K x 8 n v S R A M Features □ H igh-perform ance C M O S non­ volatile static RAM 2048 x 8 bits □ 25, 35 and 45 ns Access Tim es □ 12, 20 and 25 ns O utput Enable A ccess T im es □ S oftw are STO R E Initiation

Contextual Info: fax id: 5012 W CYPRESS PRELIMINARY CY7C9700 Fast Ethernet Repeater Controller Features • R e p e ate r loo p back m o d e fo r tes tin g • S erial E E P R O M in te rfac e su p p o rts cu sto m re p e ate r c o n fig u ra tio n s • 13 Port IEEE 8 0 2 .3u co m p lia n t 10 0B A S E -T R epeater

Contextual Info: 19-4191; Rev. 1 ;7 /9 2 / l/ l/ J X I/ l/ l 4 th - a n d 8 th O rder C ontinuous-Tim e A c tiv e F ilters G eneral D escription _ Features • ♦ Continuous-Time Filter - No Clock, No Clock Noise ♦ Implement Butterworth, Chebyshev, Bessel and

P89LPC952

Abstract: 74HCT02 SM4004 p548
Contextual Info: Q Q > \P 1 7 \E L f i_ \E L 5 _ \P 1 4 \E L 3 _ \E L 2 _ \P 1 1 \P 1 0 10 \P 0 7 \E O fi_ \E 0 5 _ \P Q .4 \E 0 3 _ \E 0 2 _ \P 0 1 \P 0 0 35 37 38 39 40 41 42 43 \P 4 7 \P 4 B \P 4 5 \P 4 4 \P 4 3 \P 4 7 \P 4 .1 \P 4 0 23 24 25 26 27 28 29 30 6 7 8 9 DTR

RFID BLOCK diagram

Abstract: AD9913 AN-953 sweep generator MOTOROLA sweep generator write 8051 adc using simple program AD9913BCPZ MO-220-VHHD-2 AD9913BCPZ-REEL7 32-lead LFCSP_VQ
Contextual Info: Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer AD9913 FEATURES GENERAL DESCRIPTION 50 mW at up to 250 MSPS internal clock speed 100 MHz analog output Integrated 10-bit DAC 0.058 Hz or better frequency resolution 0.022° phase tuning resolution

XC5200

Abstract: XC9500 Seminar .5um
Contextual Info: Fall 1996 Seminar Summary Fall Seminar - Summary - 1 Future Directions - ICs Price Log $800 10KG 25KG 60KG 125KG >250KG High Density $200 $50 $12 Low Cost $5 .8µm Fall Seminar - Summary - 2 .6µm .5µm .35µm .25µm IC Technology Future Directions - Software

AD9858

Abstract: AD9858FDPCB AD9858PCB AD9858B ncd62
Contextual Info: 1 GSPS Direct Digital Synthesizer AD9858 FEATURES GENERAL DESCRIPTION 1 GSPS internal clock speed Up to 2 GHz input clock selectable divide by 2 Integrated 10-bit D/A converter Phase noise < 145 dBc/Hz @ 1 kHz offset Output frequency = 100 MHz (DAC output)

AD9858B

Contextual Info: PRELMINARY TECHNICAL DATA 1 GSPS Direct Digital Synthesizer a AD9858 Preliminary Technical Data P Integrated Programmable Charge Pump and Phase Frequency Detector with Fast Lock Circuit Isolated Charge Pump Supply up to 5V Integrated 2GHz Mixer FEATURES 1 GSPS Internal Clock Speed

0221l

Abstract: APPLICATION NOTES CD 7474 IC bit-slice TGC119 TGC100 IPF 830 RC02X ci 7432 ttl DTN20 tsg 271
Contextual Info: TGC100 Series 1-|im CMOS Gate Arrays RELEASE 4.0. REVISED SEPTEMBER 1991 14 Arrays with up to 26K Available Gates C E LL C O LU M N Fast Prototype Turnaround Time W IR IN G C H A N N E L Extensive Design Support -Design Libraries Compatible With Valid,u and Mentor CAE Systems

DIODE S4 72A

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 AVDD3 AVDD1_SR DVDD DRVDD SPIVDD 1.25V (1.25V) (2.5V) (3.3V) (1.25V) (1.25V) (1.8V TO 3.3V) FD_B Rev. B SIGNAL MONITOR 14 VIN+B VIN–B DDC ADC CORE BUFFER CONTROL REGISTERS V_1P0 SIGNAL MONITOR CLOCK GENERATION

ad80255

Abstract: marking AD9122BCPZ ad9122 AD9122-M5375 ADL5375-15 AVDD33 AD9122-M5375-EBZ
Contextual Info: Dual, 16-Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter AD9122 FEATURES GENERAL DESCRIPTION Flexible LVDS interface allows word, byte, or nibble load Single-carrier W-CDMA ACLR = 82 dBc @ 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω

AD9914

Abstract: ad9914bcpz polar modulator 32DDS hexadecimal 978MHz 2.4GHZ synthesizer
Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

LTE filter band 13

Abstract: lmds cdma clock LTE filter band 40 ADL5375 ADL5375-15 X band 5-bit phase shifter AVDD33 2120D
Contextual Info: Dual, 16-Bit, 1000 MSPS, TxDAC+ Digital-to-Analog Converter AD9125 FEATURES GENERAL DESCRIPTION Flexible CMOS interface allows dual-word, word, or byte load Single-carrier W-CDMA ACLR = 80 dBc at 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω

M23145

Abstract: AD9914 427MHz
Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Preliminary Technical Data FEATURES Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability Multichip synchronization

751768

Abstract: com200201 IC 75176B DATASHEET Standard Microsystems 20020 POR SMC com200201 ARCNET driver HYC9088 COM20020 C0M20020 smc com20020
Contextual Info: COM20020 SMC STANDARD MICROSYSTEMS CORPORATION COM20020 ULANC Universal Local Area N etw ork Controller w ith 2K X 8 On-Board RAM FEATURES • • • • • • • • • • • • • • 24-Pin Embedded N e tw o rk C ontroller/ T ransceiver/RAM Ideal fo r Industrial/Factory A uto m a tio n

jedec mo-142 dd

Contextual Info: Features * * * * * * * * * * Single Supply Voltage, Range 2.7V to 3.6V Single Supply for Read and Write Fast Read Access Time - 70 ns Internal Program Control and Timer 8K bytes Boot Block With Lockout Fast Erase Cycle Time -1 0 seconds Byte By Byte Programming - 30 ^s/Byte typical

Contextual Info: WE32K32-XXX M/HITE /M ICROELECTRONICS 32Kx32 EEPROM MODULE, S M D 5962-94614 FEATURES • A c c e s s T im e s o f 9 0 ,1 2 0 ,1 50ns ■ C o m m ercial, Ind ustrial and M ilita ry Tem perature Ranges ■ M IL-STD -883 Com pliant D e vice s A va ila b le ■ A u to m atic Page W rite Operation

A11P

Abstract: A12P 13-30dB A15P J 9631
Contextual Info: Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter AD9148 Data Sheet FEATURES GENERAL DESCRIPTION Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF Channel-to-channel isolation > 90 dB Analog output Adjustable 8.7 mA to 31.7 mA RL = 25 Ω to 50 Ω Novel 2x, 4×, and 8× interpolator eases data interface

Contextual Info: Features * * * * * * * * * * Single Supply Voltage, Range 2.7V to 3.6V Single Supply for Read and Write Fast Read Access Time - 55 ns Internal Program Control and Timer 8K bytes Boot Block With Lockout Fast Erase Cycle Time -1 0 seconds Byte By Byte Programming - 30 |_is/Byte typical

ta 8272 hq

Abstract: ADL537x hb2e B12N 000342
Contextual Info: Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter AD9148 Data Sheet FEATURES GENERAL DESCRIPTION Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF Channel-to-channel isolation > 90 dB Analog output Adjustable 8.7 mA to 31.7 mA RL = 25 Ω to 50 Ω Novel 2x, 4×, and 8× interpolator eases data interface

Contextual Info: T H IS D R A W ]N G V FR T R A U i-J-¿l i r ' C CO PYRIGHT IS UNPUBL I RELEASED 11*ItF&TFT- h i-Kil i iC H T F Z EIC H N U N G BY 1987 FR EI AMP IN C O R P O R A T E D . FO R FUER ,Ï9-. P U B L IC A T IO N V E R O E F F E N T L ÍC H U N t ï 6 M ATED

Contextual Info: IN STR U C TIO N SET Table 21 - Instruction Set READ D A T A D A T A BUS PHASE Command R/W D7 D6 D5 D4 D3 D2 D1 DO W MT MFM SK 1 1 w w w w w w w w r H Command Codes HDS DS1 DSO Sector ID info rm a tio n prior to Command execution. F N EOT GPL DTL Execution

ADL5372

Abstract: A15N AD9148 ADL5371 AVDD33 A11P
Contextual Info: Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter AD9148 Preliminary Technical Data FEATURES GENERAL DESCRIPTION Single-carrier W-CDMA ACLR = 80 dBc @ 150 MHz IF Channel-to-channel isolation > 90 dB Analog output Adjustable 8.7 mA to 31.7 mA RL = 25 Ω to 50 Ω