FTW 12-1 2 Search Results

Contextual Info: 19-4191; Rev. 1 ;7 /9 2 / l/ l/ J X I/ l/ l 4 th - a n d 8 th O rder C ontinuous-Tim e A c tiv e F ilters G eneral D escription _ Features • ♦ Continuous-Time Filter - No Clock, No Clock Noise ♦ Implement Butterworth, Chebyshev, Bessel and

P89LPC952

Abstract: 74HCT02 SM4004 p548
Contextual Info: Q Q > \P 1 7 \E L f i_ \E L 5 _ \P 1 4 \E L 3 _ \E L 2 _ \P 1 1 \P 1 0 10 \P 0 7 \E O fi_ \E 0 5 _ \P Q .4 \E 0 3 _ \E 0 2 _ \P 0 1 \P 0 0 35 37 38 39 40 41 42 43 \P 4 7 \P 4 B \P 4 5 \P 4 4 \P 4 3 \P 4 7 \P 4 .1 \P 4 0 23 24 25 26 27 28 29 30 6 7 8 9 DTR

RFID BLOCK diagram

Abstract: AD9913 AN-953 sweep generator MOTOROLA sweep generator write 8051 adc using simple program AD9913BCPZ MO-220-VHHD-2 AD9913BCPZ-REEL7 32-lead LFCSP_VQ
Contextual Info: Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer AD9913 FEATURES GENERAL DESCRIPTION 50 mW at up to 250 MSPS internal clock speed 100 MHz analog output Integrated 10-bit DAC 0.058 Hz or better frequency resolution 0.022° phase tuning resolution

AD9858

Abstract: AD9858FDPCB AD9858PCB AD9858B ncd62
Contextual Info: 1 GSPS Direct Digital Synthesizer AD9858 FEATURES GENERAL DESCRIPTION 1 GSPS internal clock speed Up to 2 GHz input clock selectable divide by 2 Integrated 10-bit D/A converter Phase noise < 145 dBc/Hz @ 1 kHz offset Output frequency = 100 MHz (DAC output)

DIODE S4 72A

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 AVDD3 AVDD1_SR DVDD DRVDD SPIVDD 1.25V (1.25V) (2.5V) (3.3V) (1.25V) (1.25V) (1.8V TO 3.3V) FD_B Rev. B SIGNAL MONITOR 14 VIN+B VIN–B DDC ADC CORE BUFFER CONTROL REGISTERS V_1P0 SIGNAL MONITOR CLOCK GENERATION

AD9914

Abstract: ad9914bcpz polar modulator 32DDS hexadecimal 978MHz 2.4GHZ synthesizer
Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

LTE filter band 13

Abstract: lmds cdma clock LTE filter band 40 ADL5375 ADL5375-15 X band 5-bit phase shifter AVDD33 2120D
Contextual Info: Dual, 16-Bit, 1000 MSPS, TxDAC+ Digital-to-Analog Converter AD9125 FEATURES GENERAL DESCRIPTION Flexible CMOS interface allows dual-word, word, or byte load Single-carrier W-CDMA ACLR = 80 dBc at 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω

751768

Abstract: com200201 IC 75176B DATASHEET Standard Microsystems 20020 POR SMC com200201 ARCNET driver HYC9088 COM20020 C0M20020 smc com20020
Contextual Info: COM20020 SMC STANDARD MICROSYSTEMS CORPORATION COM20020 ULANC Universal Local Area N etw ork Controller w ith 2K X 8 On-Board RAM FEATURES • • • • • • • • • • • • • • 24-Pin Embedded N e tw o rk C ontroller/ T ransceiver/RAM Ideal fo r Industrial/Factory A uto m a tio n

Contextual Info: WE32K32-XXX M/HITE /M ICROELECTRONICS 32Kx32 EEPROM MODULE, S M D 5962-94614 FEATURES • A c c e s s T im e s o f 9 0 ,1 2 0 ,1 50ns ■ C o m m ercial, Ind ustrial and M ilita ry Tem perature Ranges ■ M IL-STD -883 Com pliant D e vice s A va ila b le ■ A u to m atic Page W rite Operation

A11P

Abstract: A12P 13-30dB A15P J 9631
Contextual Info: Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter AD9148 Data Sheet FEATURES GENERAL DESCRIPTION Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF Channel-to-channel isolation > 90 dB Analog output Adjustable 8.7 mA to 31.7 mA RL = 25 Ω to 50 Ω Novel 2x, 4×, and 8× interpolator eases data interface

Contextual Info: T H IS D R A W ]N G V FR T R A U i-J-¿l i r ' C CO PYRIGHT IS UNPUBL I RELEASED 11*ItF&TFT- h i-Kil i iC H T F Z EIC H N U N G BY 1987 FR EI AMP IN C O R P O R A T E D . FO R FUER ,Ï9-. P U B L IC A T IO N V E R O E F F E N T L ÍC H U N t ï 6 M ATED

Contextual Info: IN STR U C TIO N SET Table 21 - Instruction Set READ D A T A D A T A BUS PHASE Command R/W D7 D6 D5 D4 D3 D2 D1 DO W MT MFM SK 1 1 w w w w w w w w r H Command Codes HDS DS1 DSO Sector ID info rm a tio n prior to Command execution. F N EOT GPL DTL Execution

A11P

Abstract: ADL5372 motorola b6n 1 GSPS Direct-Clocking Single-Sideband Upconversion of Quadrature DDS WiMAX ADL5373 baseband AD9148 AVDD33 FHB20
Contextual Info: Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter AD9148 FEATURES GENERAL DESCRIPTION Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF Channel-to-channel isolation > 90 dB Analog output Adjustable 8.7 mA to 31.7 mA RL = 25 Ω to 50 Ω Novel 2x, 4×, and 8× interpolator eases data interface

AD9952ASV

Abstract: 250kHz-10MHz
Contextual Info: 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer A Preliminary Technical Data AD9952 Support for 5v input levels on most digital inputs PLL REFCLK multiplier 4X to 20X Internal oscillator, can be driven by a single crystal Phase modulation capability

Contextual Info: in t e i 80150/ 80150-2 ¡APX 66/50, 66/50, lÖO/'SO, iöo /'öo CP/M-86 OPERATING SYSTEM PROCESSORS • High-Performance Two-Chip Data Processors Containing the Complete CP/M-86 Operating System Memory Disk Makes Possible Diskless CP/M-86 Systems ■ Standard On-Chip BIOS Basic

AD9548

Abstract: Gardner linear ramp technique AN-1079 S1KD obstacle detector 1pps
Contextual Info: AN-1079 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Determining the Maximum Tolerable Frequency Drift Rate of the AD9548 System Clock in Low Loop Bandwidth Applications

RS flip flop IC

Contextual Info: \\M \W MA Series 2.5 MICRON SILICON-GATE CMOS GATE ARRAYS /MATRA-HARRIS SEMICONDUCTOR JULY 1986 2.5/x/1 METAL LAYER HIGH SPEED CMOS GATE ARRAYS UP TO 25 MHz INTERNAL OPERATING FREQUENCY Features Description The M A 0 2 5 0 -M A 0 4 0 0 -M A 0 8 0 0 -M A 1200 Gate

AD9549

Abstract: CP-64-1 "Digital Comparator" SMA100 IS1944 0x0333
Contextual Info: Dual Input Network Clock Generator/Synchronizer AD9549 FEATURES APPLICATIONS Flexible reference inputs Input frequencies: 8 kHz to 750 MHz Two reference inputs Loss of reference indicators Auto and manual holdover modes Auto and manual switchover modes Smooth A-to-B phase transition on outputs

MAX274AENG

Abstract: MAX274 FP 01PF 331 2.5 8th order highpass butterworth filter
Contextual Info: 19-4191; Rev 3; 10/96 Æ / X I Æ a n d 8 th -O rd e r C o n tin u o u s -T im e A c tiv e F ilte rs _ Features ♦ Continuous-Time Filter - No Clock, No Clock Noise ♦ Implement Butterworth, Chebyshev, Bessel and Other Filter Responses

AD9951

Abstract: AD9951 Application Notes AD9951PCB AD9951YSV
Contextual Info: 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer A Preliminary Technical Data AD9951 PLL REFCLK multiplier 4X to 20X Internal oscillator, can be driven by a single crystal Phase modulation capability FEATURES 400 MSPS Internal Clock Speed Integrated 14-bit D/A Converter

88E6097

Abstract: 88E6020 88E1119 88E6071 Marvell 88E1512 88AP270M 88W8897 Marvell PHY 88E6352 88PG867 MV64460
Contextual Info: 2015 Marvell Product Selector Guide TOTAL SOLUTIONS FROM MARVELL Providing a b ro a d s p e c t r u m o f s o l u t i o n s a c ro ss a w i d e ra n g e o f m a r ke t s e g m e n t s . TABLE OF CONTENTS Application Processors .

Contextual Info: SM-T2/SM-R2 Sa m H o p Microelectronics Corp. REMOTE CONTROLLER WITH FIVE FUNCTION GENERAL DESCRIPTION FEATURES The S M -T2 / SM -R 2 is a pa ir of CMOS chip, it was designed for remote controlled car applications. * Power supply : 2.4V - 5.0V The SM-T2 / SM-R2 has five control keys

TA7256P

Abstract: RL33
Contextual Info: - 356 - TA7256P 2 S & ,W — O P T X 7 0 • * h • IJ ì y f t t à : I sC=350mA R sC = 2 . 2 Q 500mA 0 - f- +• y i f . i V • • S I P - 1 0 t" y ft a « S « A * « EE / V äS S A A W I / V » # = » * / ■c s s « * 12500 m A 48 m W J»«Œ

Contextual Info: 14-Bit, 500 MSPS LVDS, Dual Analog-to-Digital Converter AD9684 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, MC-GSM, LTE General-purpose software radios Ultrawideband satellite receiver