FIGURE35 Search Results

tc9800

Contextual Info: 3. N o t e s o n D e s i g n i n g a n d H a n d l in g C ir c u it s 3.1 Electrostatic D ischarge CMOS ICs have a very thin gate insulation oxide film. W hen a high voltage is applied to this gate electrode input of CMOS IC , the oxide film directly under the gate som etimes

ba1s

Contextual Info: IS43LR32400E Advanced Information 1M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43LR32400E is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 1,048,576 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The address lines are multiplexed with the Data

IS43LR16640A

Abstract: IS43LR16640A-5BLI IS43LR16640A-6BLI IS46LR16640A-5BLA1 IS43LR16640A-6BL
Contextual Info: IS43/46LR16640A Advanced Information 16M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16640A is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 16,777,216 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

Contextual Info: ANALOG ÜFVICFS INC ANALOG DEVICES SIE D DfllbflGO Ü D 3 7 0 M M '- 7 1 - H - 374 • ANA l Precision Instrumentation Amplifier FEATURES Low Noise: 0 .3 | jlV p-p 0.1 Hz to 10Hz Low Nonlinearity: 0.003% G = 1 High CMRR: 120dB (G = 1000) Low Offset Voltage: 50|iV

Contextual Info: Dual Output Non-Synchronous Buck Controller with Sync Function and Second Channel Enable Features D escription The CS-5127 is a fixed frequency d u al o u tp u t non-synchronous buck controller. It contains circuitry for regulating tw o separate outputs. Each o u tp u t channel contains a

46LR32640A

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR32640A 16M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32640A is 2,147,483,648 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 33,554,432 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

CA3140S

Abstract: Transistor Equivalent TT 2142 Harris CA3140AE diagram transistor tt 2140 CA3140 CA3140E Transistor TT 2140 PIN DIAGRAM OF IC CA3140 CA3130 peak detector CA3140AE
Contextual Info: HARRIS SEPIICOND SECTOR blE D • 4302271 □D4bE‘lS 2TD H H A S HARRIS SEMICONDUCTOR CA3140 M ■ m W BiMOS Operational Amplifier with MOSFET Input/Bipolar Output April 1993 Features Description MOSFET Input Stage - Vary High Input Impedance Z,N -1.5TQ (Typ.)

Contextual Info: DUAL CHANNEL T1/E1/J1 LONG HAUL/ SHORT HAUL LINE INTERFACE UNIT IDT82V2082 FEATURES: • • • • • • • - Dual channel T1/E1/J1 long haul/short haul line interfaces Supports HPS Hitless Protection Switching for 1+1 protection without external relays

SPWM IC

Abstract: w78e65 spwm SM5694 A31h BRM-1 syncmossm5964 SM5964 SM59XX P89C51RD2
Contextual Info: PWM/SPWM APN 新茂國際科技股份有限公司 For SM59XX/89XXA SyncMOS SM5964 & Winbond W78E65 & Philips P89C51RD2 SyncMOS Technologies Inc. PWM 之差異 1.腳位定義及 SFR 設定: 1. Pin 腳的位置及名稱 IC Pin 腳位置 P1.3 CH_0 P1.4(CH_1)

IST13

Contextual Info: CR16MNS5, CR16MFS5, and CR16MPS5 are Obsolete Devices CR16MES5,CR16MES9,CR16MFS5,CR16MFS9, CR16MHS5,CR16MHS9,CR16MNS5,CR16MNS9, CR16MPS5,CR16MUS5,CR16MUS9 6MPS5/CR16MUS5/CR16MUS9 Family of CompactRISC 16-Bit Microcontrollers

46LR16640A

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16640A Advanced Information 16M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16640A is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 16,777,216 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

46LR32640A

Abstract: Mobile DDR SDRAM IS43LR32640A-5BLI IS46LR32640A-5BLA1 64Mx32 Mobile DDR SDRAM IS43LR32640A
Contextual Info: IS43/46LR32640A Advanced Information 16M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32640A is 2,147,483,648 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 33,554,432 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

46LR16320C

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16320C Preliminary Information 8M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16320C is 536,870,912 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 8,388,608 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

446H

Abstract: 451H RDN11 GR-253-CORE GR-499-CORE IDT82P2821 640-Pin
Contextual Info: 21 +1 Channel High-Density T1/E1/J1 Line Interface Unit IDT82P2821 Version 3 February 6, 2009 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 1-800-345-7015 or 408-284-8200• TWX: 910-338-2070 • FAX: 408-284-2775 Printed in U.S.A.

ILI9325DS_V0.43

Abstract: ILI9325 BIT 3195 G G184 BIT+3195+G ILI9325D
Contextual Info: ILI9325 a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K color Datasheet Version: V0.43 Document No.: ILI9325DS_V0.43.pdf ILI TECHNOLOGY CORP. 4F, No. 2, Tech. 5th Rd., Hsinchu Science Park, Taiwan 300, R.O.C. Tel.886-3-5670095; Fax.886-3-5670096

Contextual Info: IS43/46LR32200B 512K x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32200B is 67,108,864 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 524,288 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted on a

Contextual Info: I S43LR16200C Advanced Information 1M x 16Bits x 2Banks Mobile DDR SDRAM Description The IS43LR16200C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 1,048,576 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2N

Contextual Info: IS43/46LR32800F 2M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32800F is 268,435,456 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 2,097,152 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

DS5202

Abstract: 3.5mm stereo headphone jack 8ohm 0.5W speakers EUA5202 EUA5202QIT1 15W 50 Ohm Resistors EUA5202QIR0 EUA5202QIR1 Figure37 EUA MARKING CODE Speaker - 0.5W 8Ohm
Contextual Info: 芯美电子 EUA5202 2-W Stereo Audio Power Amplifier with Mute DESCRIPTION FEATURES z The EUA5202 is a stereo audio power amplifier that delivering 2W of continuous RMS power per channel into 3-Ω loads. When driving 1W into 8-Ω speakers, the EUA5202 has less than 0.04% THD+N across its

Contextual Info: OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT IDT82V2048 FEATURES ! ! ! ! ! ! ! ! Fully integrated octal T1/E1 short haul line interface which supports 100 Ω T1 twisted pair, 120 Ω E1 twisted pair and 75 Ω E1 coaxial applications Selectable Single Rail mode or Dual Rail mode and AMI or

K411

Contextual Info: 16 +1 Channel High-Density T1/E1/J1 Line Interface Unit IDT82P2816 Version 1 December 7, 2005 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 1-800-345-7015 or 408-284-8200• TWX: 910-338-2070 • FAX: 408-284-2775 Printed in U.S.A.

82p2816

Abstract: 15Dh motorola
Contextual Info: 16 +1 Channel High-Density T1/E1/J1 Line Interface Unit IDT82P2816 Version August 26, 2005 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 1-800-345-7015 or 408-284-8200• TWX: 910-338-2070 • FAX: 408-284-2775 Printed in U.S.A. 2005 Integrated Device Technology, Inc.

Contextual Info: QUAD T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT ADVANCE INFORMATION IDT82V2084 FEATURES: • • • • • • • Four channel T1/E1/J1 long haul/short haul line interfaces Supports HPS Hitless Protection Switching for 1+1 protection without external relays

IDT82V2082

Abstract: TQFP80 I.431 T1 diode Chip rail 6229
Contextual Info: ADVANCE INFORMATION DUAL CHANNEL T1/E1/J1 LONG IDT82V2082 HAUL/SHORT HAUL LINE INTERFACE UNIT FEATURES: • • • • • • • - Dual channel T1/E1/J1 long haul/short haul line interfaces Supports HPS Hitless Protection Switching for 1+1 protection