FCT88915TT Search Results

fct88915

Abstract: PY 55
Contextual Info: FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE LOW SKEW PLL-BASED CMOS CLOCK DRIVER FCT88915TT 55/70/100/133 DESCRIPTION: FEATURES: The FCT88915TT uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock

fct88915

Abstract: IDT74FCT88915TT MC68040 MC88915 88915TT
Contextual Info: FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE LOW SKEW PLL-BASED CMOS CLOCK DRIVER FCT88915TT 55/70/100/133 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec FREQ_SEL = HIGH

CHN 530

Abstract: chn 707 hiab chn 445 CHN 455
Contextual Info: :Q§ LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE : jdfr/ Integrated De vice Technology, Inc. FEATURES: FCT88915TT 55/70/100/133 mance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially

79x15

Contextual Info: HIGH-SPEED 64/32K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6/7/9/12/15ns max. – Industrial: 12ns (max.)

TCD-1

Contextual Info: HIGH-SPEED 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM IDT709279/69S/L Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

Contextual Info: IDT709189/79L HIGH-SPEED 64/32K x 9 OBSOLETE PARTS SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12ns max.

Contextual Info: HIGH-SPEED 16/8K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM IDT709169/59L Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max.

Contextual Info: IDT709379/69L HIGH-SPEED 32/16K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12ns max.

A14L

Abstract: IDT709269
Contextual Info: HIGH-SPEED 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM IDT709279/69S/L Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

cc 3053 diode

Contextual Info: LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE FEATURES: • 0.5 M IC R O N C M O S Technology • Input frequency range: 10M Hz - f2Q Max. spec (FR E Q _S EL = HIGH) • Max. output frequency: 133M H z • Pin and function compatible with M C 88915T

Contextual Info: HIGH-SPEED 16/8K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max. Industrial: 7.5ns (max.)

A14L

Abstract: IDT709369
Contextual Info: IDT709379/69L HIGH-SPEED 32/16K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12ns max.

Power Filter Oscilator

Abstract: IDT74FCT88915TT MC68040 MC88915 74fct88915
Contextual Info: FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE LOW SKEW PLL-BASED CMOS CLOCK DRIVER FCT88915TT 55/70/100/133 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec FREQ_SEL = HIGH

Contextual Info: HIGH-SPEED 16/8K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max. Industrial: 7.5ns (max.)

t8891

Contextual Info: In te g rate d D e vic e Technology, Inc. LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE IDT54/FCT88915TT 55/70/100/133 PRELIMINARY is fed back to the PLL at the FEEDBACK input resulting in essentially delay across the device. The PLL consists of the

A12L

Abstract: IDT709349 5633
Contextual Info: HIGH-SPEED 8/4K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM IDT709359/49L Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max.

A12L

Abstract: A13L IDT709159
Contextual Info: HIGH-SPEED 16/8K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM IDT709169/59L Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max.

A12L

Abstract: A13L IDT709159
Contextual Info: HIGH-SPEED 16/8K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM IDT709169/59L Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max.

Contextual Info: Integrated Device Technology, Inc. LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE FEATURES: • 0.5 M ICRO N CM O S Technology • Input frequency range: 10MHz - f2Q Max. spec (FREC LSEL = HIGH) • Max. output frequency: 133MHz • Pin and function com patible with MC88915T

Contextual Info: Integrated Device Technology, Inc. LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE FEATURES: • • • • • • • • • • • • 0.5 MICRON CMOS Technology Input frequency range: 2.5M Hz - f2Q Max. spec Max. output frequency: 133MHz Pin and function compatible with MC88915T

diode cc 3053

Abstract: cc 3053 cc 3053 diode "voltage controlled oscilator" Frequency Generator 10MHz Power Filter Oscilator IDT74FCT88915TT MC88915T FCT88915TT
Contextual Info: FCT88915TT 55/70/100/133 LOW SKEW PLL-BASED CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE Integrated Device Technology, Inc. FEATURES: FCT88915TT 55/70/100/133 mance PCs and workstations. One of the outputs is fed back

IDT74FCT88915TT

Abstract: MC68040 MC88915
Contextual Info: FCT88915TT LOW SKEW PLL-BASED CMOS CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE LOW SKEW PLL-BASED CMOS CLOCK DRIVER FEATURES: − − − − − − − − − − FCT88915TT 55/70/100/133 PRELIMINARY skew clock distribution for high performance PCs and workstations. One of

wolaver

Abstract: FCT388915T FCT3932 signal detection circuit "peak hold" constant vol nyquist plot
Contextual Info: PHASE-LOCKED LOOP CLOCK GENERATORS APPLICATION NOTE AN-155 Integrated Device Technology, Inc. By Anupama Hegde INTRODUCTION FREQUENCY MULTIPLICATION .51 JITTER . 52

AN-154

Abstract: SSOP-56 810-t 388915T CERPACK equivalent
Contextual Info: ESTIMATING POWER DISSIPATION IN CMOS DEVICES APPLICATION NOTE AN-154 Integrated Device Technology, Inc. By Anupama Hegde TJMAX. TJMAX is normally based on the limits imposed by die Due to higher system frequencies, new packages and reliability. Based on this TJMAX limit, maximum allowable