HIAB Search Results

n5406

Abstract: ln5400 N5404 N5408 1N5406 lN540 1N5400 motorola 1N54001 1N5408 1N5401
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL Order this document by lN5400/D DATA hiaB-Lead Standard Recovery Rectifiers 1N5400 thru 1N5408 Lead mounted standard recovey rectifiers are designed for use in power supplies and other applications having need of a device with the following features:

Contextual Info: IDT71321SA/LA HIGH SPEED IDT71421SA/LA 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS F eatures ♦ MASTER IDT71321 easily expands data bus width to 16-or- ♦ High-speed access IDT71321/IDT71421SA more-bits using SLAVE IDT71421 ♦ On-chip port arbitration logic IDT71321 only

laf 0001 ic Substitution

Abstract: gs 3935 car central lock Car Central lock system circuit diagram of car central lock system 80386 microprocessor pin out diagram CD1400 CTSR LA 7804 OA CL-CD1400
Contextual Info: C I RR US LO GI C INC SlBfcikiB'i ODDlll* *J • CIR CL-CDUOO 'CIRRUS LOGIC Preliminary D ata Sheet T-7T-37-OS" FEATURES Four-channel Serial/Parallel Communications Engine with UNIX Character Processing Asynchronous Features ■ Software-programmable serial data rates up to

stk 412 -410

Abstract: stk 412 -420 stk 432 070 MM5823 STK 412 240 CIR 2262 cir 2262 af stk 412 -230 hiab STk 412 120
Contextual Info: S lB b b B R DDOtilS4 “i2 ñ m C I R wm. C L -C D 2 4 0 0 /C D 2401 •SK-H CIRRUS LOGIC Data Book FEATURES Four-Channel, Multi-Protocol Communications Controller General • Four full-duplex channels ■ All channels support async, blsync, HDLC/ SDLC, and X.21 programmable sync protocols

ansi y14.5m-1982 .xxxx

Abstract: diode chn 115
Contextual Info: :nW J d t In te g ra te d D e v ic e T e c h n o lo g y , Inc. 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE) FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz - f2Q Max. spec (F R E Q S E L = HIGH) • Max. output frequency: 150MHz

CHN 530

Abstract: chn 707 hiab chn 445 CHN 455
Contextual Info: :Q§ LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE : jdfr/ Integrated De vice Technology, Inc. FEATURES: IDT74FCT88915TT 55/70/100/133 mance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially

abb fox 6

Abstract: ALG circuit breaker
Contextual Info: Relion Protection and control 650 series IEC 61850 Communication Protocol Manual Document ID: 1MRK 511 242-UEN Issued: February 2011 Revision: Product version: 1.1 Copyright 2011 ABB. All rights reserved Copyright This document and parts thereof must not be reproduced or copied without written

idt7132

Abstract: ROY TODD IDT71321 IDT71421 71321SA J52-1
Contextual Info: IDT71321SA/LA HIGH SPEED IDT71421SA/LA 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS F eatures ♦ MASTER IDT71321 easily expands data bus width to 16-or- ♦ High-speed access IDT71321/IDT71421SA more-bits using SLAVE IDT71421 ♦ On-chip port arbitration logic IDT71321 only

7110F

Abstract: CA10 CA12 PSB7110
Contextual Info: ICs for Communications Enhanced ISDN Data Access Controller ISAR PSB 7110 Version 1.0 Software Version #4 Data Sheet 07.96 T7110-XV10-D3-7600 7110 PSB 7110 Revision History: Previous Releases: Page Fehler! Textmarke nicht definiert.

Contextual Info: HIGH-SPEED 3.3V 32K x 8 DUAL-PORT STATIC RAM PRELIMINARY IDT70V07S/L F e a tu re s True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed access ♦ - ♦ Commercial: 25/35/55ns max. Low-power operation -

Contextual Info: HIGH SPEED 4K X 8 DUAL-PORT STATIC RAM WITH SEMAPHORE D e sc rip tio n F e a tu re s • High-speed access - Commercial: 20/25/35/45/55/70ns max. • Low-power operation - IDT71342SA Active: 700mW(typ.) Standby: 5m W (typ.) - ID T 7 1 3 4 2 S A /L A IDT71342LA

PSB 7200

Abstract: 7110F PSB7110
Contextual Info: ICs for Communications Enhanced ISDN Data Access Controller ISAR PSB 7110 Version 1.0 Software Version #4 Data Sheet 07.96 T7110-XV10-D3-7600 7110 PSB 7110 Revision History: Fehler! Textmarke nicht definiert.

transistor RCA 467

Abstract: ota ca 3080 RCA 3080 rca CA3080 RCA 467 rca cmos book rca cmos handbook IEEE J. Solid State Circuits, SC "rca application note" rca 1967
Contextual Info: R. L. Geiger and E. Sánchez-Sinencio, "Active Filter Design Using Operational Transconductance Amplifiers: A Tutorial," IEEE Circuits and Devices Magazine, Vol. 1, pp.20-32, March 1985. Active Filter Design Using Operational Transconductance Amplifiers: A Tutorial

Contextual Info: PRELIMINARY IDT71V33S/L IDT71V43S/L HIGH-SPEED 2 K X 16 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. FEATURES: • High-speed access — Com m ercial: 25/35/55ns max. • Low-power operation — IDT71V33/43S Active: 750 mW (typ.) Standby: 3.3m W (typ.)

Contextual Info: CMOS SyncBiFIFO“ 2 5 6 x 1 8 x 2 and 5 1 2 x 1 8 x 2 IDT72605 IDT72615 Integrated Device Technology, Inc. FEATURES: • Two independent FIFO m em ories for fully bidirectional data transfers • 256 x 18 x 2 organization IDT72605 • 512 x 18 x 2 organization (IDT72615)

TWFC

Contextual Info: HIGH SPEED 3.3V 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS IDT71V321S/L IDT71V421S/L Features ♦ ♦ ♦ ♦ ♦ BUSY output flag on IDT71V321 ; BUSY input on IDT71V421 Fully asynchronous operation from either port Battery backup operation— 2V data retention

MO-067-AC

Abstract: TIP 61 pin
Contextual Info: IDT70914S HIGH SPEED 36K 4K X 9 SYNCHRONOUS DUAL-PORT RAM Features * * High-speed clock-to-data output times - F ast 12ns clock to data out - M ilitary: 20125ns (max.) - S elf-tim ed write allow s fast cycle tim es - C o m m e rc ia l^ 2 /1 5/20ns (max.)

T7026

Contextual Info: HIGH-SPEED 16K X 16 DUAL-PORT STATIC RAM IDT7026S/L Features * * * * plexed bus compatibility IDT7026 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one d e v ic e _ ♦ M/S = H for BUSY output flag on Master,

Contextual Info: ydt HIGHSPEED 2K X 8 DUAL-PORT IDT71321SA/LA IDT71421SA/LA STATIC RAM WITH INTERRUPTS Integrated De vice Technology, Inc. FEATURES: M ASTER IDT71321 easily expands data bus w idth to 16- • H igh-speed access — C om m ercial: 20/25/35/55ns max.) or-m ore-bits using SLAVE IDT71421

Contextual Info: IDT70914S HIGH SPEED 36K 4K X 9 SYNCHRONOUS DUAL-PORT RAM Features * * High-speed clock-to-data output times - F ast 12ns clock to data out - M ilitary: 20125ns (max.) - S elf-tim ed write allow s fast cycle tim es - C o m m e rc ia l^ 2 /1 5/20ns (max.)

land pattern tsop 66

Contextual Info: HIGH-SPEED 3.3V 8K x 8 DUAL-PORT STATIC RAM IDT70V05S/L F e a tu re s ♦ True Dual-Ported memory cells which allow simultaneous reads of the same memory location ♦ High-speed access Commercial: 25/35/55ns max. * Low-power operation IDT70V05S Active: 230mW (typ.)

MO-081

Contextual Info: IDT7133SA/LA IDT7143SA/LA HIGH SPEED 2 K X 16 DUAL-PORT SRAM î * 44k 4 'S 4k «h* '> «% • % « «' S S*'» «t % *S ««Í '■ •*SÂfea! F e a tu re s ♦ High-speed access ♦ BUSY output flag on IDT7133; BUSY input on IDT7143 - M ilitary: 25/35/45/55/70/90ns max.

Contextual Info: dy In te g ra te d D €5vize T e c h n o lo g y , l i e . BUS-MATCHING BIDIRECTIONAL FIFO 5 1 2 x 1 8-BIT - 1,024 x 9-BIT 1,024 x 18-BIT - 2,048 x 9-BIT FEATURES: • Two side-by-side FIFO m em ory arrays for bidirectional data transfers • 5 1 2 x 1 8-Bit - 1,024 x 9-Bit ID T72510

Contextual Info: CMOS PARALLEL-SERIAL FIFO 2,048 x 9 and 4,096 x 9 IDT72103 IDT72104 Integrated Device Technology, Inc. FEATURES: APPLICATIONS: • • • • • • • • • • • • • • • • • • • • 35ns parallel port access time, 45ns cycle time 50MHz serial input/output frequency