EDD5108AFTA Search Results

DDR333

Abstract: DDR400 EDD5108AFTA EDD5108AFTA-5B-E EDD5108AFTA-5C-E EDD5108AFTA-6B-E EDD5108AFTA-7A-E EDD5116AFTA
Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA 64M words x 8 bits EDD5116AFTA (32M words × 16 bits) Specifications Features • Density: 512M bits • Organization ⎯ 16M words × 8 bits × 4 banks (EDD5108AFTA) ⎯ 8M words × 16 bits × 4 banks (EDD5116AFTA)

DDR333

Abstract: DDR400 EDD5108AFTA EDD5108AFTA-5B-E EDD5108AFTA-5C-E EDD5108AFTA-6B-E EDD5108AFTA-7A-E EDD5116AFTA EDD5116AFTA-5B-E
Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA 64M words x 8 bits EDD5116AFTA (32M words × 16 bits) Features • Density: 512M bits • Organization  16M words × 8 bits × 4 banks (EDD5108AFTA)  8M words × 16 bits × 4 banks (EDD5116AFTA) • Package: 66-pin plastic TSOP (II)

Contextual Info: PRELIMINARY DATA SHEET 512M bits DDR SDRAM EDD5108AFTA-5 64M words x 8 bits, DDR400 EDD5116AFTA-5 (32M words × 16 bits, DDR400) Description Pin Configurations The EDD5108AFTA and the EDD5116AFTA are 512M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 8 bits × 4 banks and 8,388,608

DDR400

Abstract: EDD5108AFTA EDD5108AFTA-5 EDD5116AFTA EDD5116AFTA-5 DRA60
Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA-5 64M words x 8 bits, DDR400 EDD5116AFTA-5 (32M words × 16 bits, DDR400) Description Pin Configurations The EDD5108AFTA and the EDD5116AFTA are 512M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 8 bits × 4 banks and 8,388,608

Contextual Info: PRELIMINARY DATA SHEET 512M bits DDR SDRAM EDD5108AFTA 64M words x 8 bits EDD5116AFTA (32M words × 16 bits) Description Pin Configurations The EDD5108AFTA and the EDD5116AFTA are 512M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 8 bits × 4 banks and 8,388,608

twrd

Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA 64M words x 8 bits EDD5116AFTA (32M words × 16 bits) Specifications Pin Configurations • Density: 512M bits • Organization ⎯ 16M words × 8 bits × 4 banks (EDD5108AFTA) ⎯ 8M words × 16 bits × 4 banks (EDD5116AFTA)

EDD5108AFTA

Abstract: DDR333 DDR400 EDD5108AFTA-5B-E EDD5108AFTA-5C-E EDD5108AFTA-6B-E EDD5108AFTA-7A-E EDD5116AFTA
Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA 64M words x 8 bits EDD5116AFTA (32M words × 16 bits) Specifications Features • Density: 512M bits • Organization  16M words × 8 bits × 4 banks (EDD5108AFTA)  8M words × 16 bits × 4 banks (EDD5116AFTA)

E0741E

Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA-5 64M words x 8 bits, DDR400 EDD5116AFTA-5 (32M words × 16 bits, DDR400) Specifications Pin Configurations • Density: 512M bits • Organization ⎯ 16M words × 8 bits × 4 banks (EDD5108AFTA) ⎯ 8M words × 16 bits × 4 banks (EDD5116AFTA)

EDD5108AFTA

Abstract: EDD5116AFTA
Contextual Info: DATA SHEET 512M bits DDR SDRAM EDD5108AFTA 64M words x 8 bits EDD5116AFTA (32M words × 16 bits) Description Pin Configurations The EDD5108AFTA and the EDD5116AFTA are 512M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 8 bits × 4 banks and 8,388,608

5bti

Abstract: DDR333 DDR333B DDR400 DDR400B
Contextual Info: PRELIMINARY DATA SHEET 512M bits DDR SDRAM WTR Wide Temperature Range EDD5116AFTA-TI (32M words x 16 bits) Specifications Features • Density: 512M bits • Organization ⎯ 8M words × 16 bits × 4 banks • Package: 66-pin plastic TSOP (II) ⎯ Lead-free (RoHS compliant)

pc2-5300

Abstract: elpida 1gb pc2 ECL120ACECN ELPIDA DDR2 PC2-3200 ELPIDA 68-FBGA Elpida DDR2 SDRAM component EDE1104ABSE EDE1108AASE
Contextual Info: SELECTION GUIDE DRAM Selection Guide Document No. E0853E70 Ver.7.0 Date Published July 2006 (K) Japan Printed in Japan URL: http://www.elpida.com Elpida Memory, Inc. 2006 DRAM Selection Guide CONTENTS 1. DDR2

5bti

Abstract: 6BTI DDR333 DDR333B DDR400 DDR400B
Contextual Info: PRELIMINARY DATA SHEET 512M bits DDR SDRAM WTR Wide Temperature Range EDD5116AFTA-TI (32M words x 16 bits) Features • Density: 512M bits • Organization  8M words × 16 bits × 4 banks • Package: 66-pin plastic TSOP (II)  Lead-free (RoHS compliant)

Contextual Info: IS43R16320B IC43R16320B 512 Mb Double Data Rate Synchronous DRAM PRELIMINARY INFORMATION AUGUST 2007 Features Specifications • Density: 512M bits • Organization ⎯ 8M words x 16 bits × 4 banks • Package: 66-pin plastic TSOP II ⎯ Lead-free (RoHS compliant)

PC2-6400

Abstract: DDR3-800D PC3-8500 DDR3-1066E DDR3-1333G pc2-5300 DDR3-800E ddr3 4gb ddp EDD1232 ELPIDA DRAM selection guide
Contextual Info: セレクションガイド DRAM セレクションガイド Document No. J1241E80 Ver.8.0 Date Published August 2008 (K) Japan Printed in Japan URL: http://www.elpida.com Elpida Memory, Inc. 2008 DRAM セレクションガイド 目 次 1. DDR3