ECSM20 Search Results

NS8390

Abstract: fuse 12 v m-tron mp-1 crystal oscillator fil-mag 23z128 SM23Z90 aui db15 to rj45
Contextual Info: MB86961A UNIVERSAL INTERFACE FOR 10BASE -T SEPTEMBER 1999 DATASHEET FEATURES polarity reversal on the twisted-pair input. • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers

Valor Electronics SF1020

Abstract: concept 21145 A7105 a7121 a7125 SF1020 ic hb14 DP83840AVCE Kappa current transformer catalog ASJ CR21 10K
Contextual Info: 21145 Connection to the Network Using Physical Layer Devices Application Note July 1999 Order Number: 278293-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

fujitsu ten connector

Abstract: fujitsu ten lc ns73M SKS 25F CTS100 ht12 decoder
Contextual Info: M B 86965 FUJITSU ET H E R C O U P L E R SINGLE-CHIP E T H E R N E T CO N T R O L L E R APRIL1993 DATASHEET F E AT URE S • Provides interface to the I/O bus of PC/XT /AT or compatible computers • Optional, generic hostinterfaceto connect to industrystandard microprocessor buses

Contextual Info: M B86960 F ilim i! NETWORK INTERFACE CONTROLLER with ENCODER/DECODER NICE DATASHEET A P R IL I 9 9 3 FEA TU R ES • High-performance packet buffer architecture pipe­ lines data for highest throughput • 20 Mbyte/second datatransferrate to/from thesystem

Contextual Info: M B 8 6 9 6 5 A/M B 8 6 9 6 5 B FUJITSU ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATASHEET Note: All descriptions apply to both the M B86965A and MB86965B FEATURES • Provides interface to the I/O bus of PC/XT /AT or compatible computers • Optional, generic host interface to connect to industrystandard microprocessor buses

mtron crystal oscillator

Abstract: LT6030 mtron ns8390 Pulse Transformers tp 12 VALOR pt4069 10BASE 44-PIN 48-PIN MB86961A
Contextual Info: MB86961A UNIVERSAL INTERFACE FOR 10BASE -T DECEMBER 1999 DATASHEET FEATURES polarity reversal on the twisted-pair input. • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers

Contextual Info: MB86965 FUJITSU ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATASHEET APRILI 993 FEATURES Provides interface to the I/O bus of PC/XT /AT or compatible computers Optional, generic host interface to connect to industrystandard microprocessor buses Interface to serial EEPROM for Node ID and configu­

Contextual Info: MB86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE -T DECEMBER 1997 DATASHEET FEATURES • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers • Direct interface to AUI and 10BASE-T outputs

fujtsu

Abstract: RBS02 BUT16
Contextual Info: MB86960 FUJITSU NETWORK INTERFACE CONTROLLER with ENCODER/DECODER NICE DATA SHEET A P R ILI 993 superior benchmark speed and application performance. The NICE device has a partitionable 2, 4, 8, or 16 kilobyte, two-bank, transmit buffer which allows multiple data packets to be “chained” together and trans­

PM6501

Abstract: BMPR10 VALOR PM6501 10BASE2 10BASE5 MB86960 MB86961 MB86965 MB84256 150145
Contextual Info: MB86965 ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATA SHEET FEATURES • Provides interface to the I/O bus of PC/XT/AT or compatible computers • Optional, generic host interface to connect to industrystandard microprocessor buses • Interface to serial EEPROM for Node ID and configuration option storage allows construction of jumperless, electronically configurable adapter cards

PM6501

Abstract: PM6501 dc to dc VALOR PM6501 10BASE2 10BASE5 MB86960 MB86961 MB86965 MBL8392A BMPR10
Contextual Info: MB86965 ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATA SHEET FEATURES • Provides interface to the I/O bus of PC/XT/AT or compatible computers • Optional, generic host interface to connect to industrystandard microprocessor buses • Interface to serial EEPROM for Node ID and configuration option storage allows construction of jumperless, electronically configurable adapter cards

ASJ CR21

Abstract: Diode GEP 53A 93c46m8 D1275 ASJ PTE CR21 ASJ em 483 epson 93c46-m8 Diode GEP 23A D12301
Contextual Info: June 1997 Application Note 65 ML6698 and DEC 21143 Adapter Implementation OVERVIEW The interface between the DEC 21143 and the ML6698 is a mix of digital and analog signals. The DEC 21143’s 5-bit interface connects to the ML6698’s 5-bit interface for 100BASE-TX operation. The ML6698 100BASE-TX

NS8390

Abstract: M-tron Industries din 6900 "aui transformers" mtron crystal oscillator pe-68048 PIN assignments of UTP cables VALOR pt4069 SM23Z90 manchester encoder
Contextual Info: MB86961A UNIVERSAL INTERFACE FOR 10BASE -T DECEMBER 1997 DATASHEET FEATURES polarity reversal on the twisted-pair input. • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers

MBL8392B

Abstract: MB86964PFV-G LED 19176 MB86964 100-PIN BA10 BA11 BA12 SQFP100 bd 5445
Contextual Info: MB86964 ETHERNET CONTROLLER WITH 10BASE-T TRANSCEIVER PRELIMINARY DATA SHEET FEATURES • Fully compliant with ISO/ANSI/IEEE 8802-3 specifications • Provides generic interface to industry-standard microprocessor busses X86, 680X0 and RISC • High-performance packet-buffer architecture pipelines

pinouts aui db15

Abstract: PM6501 fujitsu ten ECU IC 74ALS245 application 161 0M
Contextual Info: M B86965 _ FUJITSU ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATA S H E E T A P R IL 1 9 9 3 FEATURES daughter and m otherboards, as w ell as expansion-bus adapter boards. An E E P R O M can be interfaced to the chip for storage o f E thernet ID and configuration set­

xmtd

Abstract: MB86965A 10BASE 10BASE2 10BASE5 MB86965 MB86965B LSA0 memory BMPR18
Contextual Info: MB86965A/MB86965B ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATA SHEET Note: All descriptions apply to both the MB86965A and MB86965B FEATURES • Provides interface to the I/O bus of PC/XT/AT or compatible computers • Optional, generic host interface to connect to industrystandard microprocessor buses

RPY 86

Abstract: BUT16
Contextual Info: M B 86960 FUJITSU N E T W O R K INTERFACE CO N T R O L L E R with E N C O D E R / D E C O D E R NICE DATASHEET FEATURES High-performance packet buffer architecture pipe­ lines data for highest throughput 20 Mbyte/second data transferrate to/from the system

NS8390

Abstract: VALOR pt4069 LT6030 86961A Fujitsu APD "aui transformers" Valor ECSM20 MB86961APD-G MB86961A
Contextual Info: MB86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE -T SEPTEMBER 1999 DATASHEET FEATURES • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers • Direct interface to AUI and 10BASE-T outputs

MB502A

Abstract: datasheet HT12 D ht12 decoder MB86960APF-G mb86953 BD10 BD12 MB86960 BUT16
Contextual Info: MB86960 NETWORK INTERFACE CONTROLLER with ENCODER/DECODER NICE DATA SHEET FEATURES • High-performance packet buffer architecture pipelines data for highest throughput • 20 Mbyte/second data transfer rate to/from the system bus • on-chip buffer controller manages pointers, reduces