DUAL AND GATE Search Results

UDN5713M

Contextual Info: 5713 5713 Data Sheet 29307B DUAL PERIPHERAL AND POWER DRIVER DUAL PERIPHERAL AND POWER DRIVER — TRANSIENT PROTECTED OUTPUTS This “mini-DlP” dual peripheral and power driver is a bipolar monolithic integrated circuit incorporating NOR logic gates, highcurrent switching transistors, and transient suppression diodes on the

5740

Abstract: GP-009
Contextual Info: SERIES 5740 DUAL PERIPHERAL/POWER DRIVERS —TRANSIENT-PROTECTED OUTPUTS UDN5742M OUTKJT2 Peripheral and power drivers combining dual logic gates, highcurrent saturated output transistors, and transient-suppression diodes is the Series UDN5740M. These monolithic dual drivers surpass the

F10210

Abstract: F10211 F10610 F10611
Contextual Info: F10210 F10211l/» F10610"* F10611 DUAL 3-3 OR • DUAL 3-3 NOR FlOK VOLTAGE COMPENSATED ECL GENERAL DESCRIPTION — The F10210 and F10610 are Dual 3-Input 3-O utput OR Gates and the F10211 and F10611 are Dual 3-Input 3-O utput NOR Gates. Each gate has three output transistors driven in parallel, with their emitters brought out on

A7900

Abstract: A7628 HJR 4102 relay 9789A GP-009 25CC UDN5741M UDN5742M UDN5743M UDN5744M
Contextual Info: DUAL PERIPHERAL/POW ER D RIVERS TRANSIENT-PRO TECTED OUTPUTS — Peripheral and power drivers combining dual logic gates, high­ current saturated output transistors, and transient-suppression diodes is the Series UDN5740M . These monolithic dual drivers surpass the

CD4072BCN

Abstract: CD4072BC CD4082BCN CD40828
Contextual Info: CD4072BM/CD4072BC Dual 4-Input OR Gate, CD4082BM/CD4082BC Dual 4-Input AND Gate General Description Features These dual gates are m onolithic complementary MOS CMOS integrated circuits constructed with N-and P-channel enhancement mode transistors. They have

EPT23

Abstract: KPT23 MC100EPT23 MC100EPT23D MC100EPT23DR2 MC100EPT23DT
Contextual Info: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate

Contextual Info: F10210 • F10211 • F10610 • F10611 DUAL 3-3OR • DUAL 3-3 NOR F10K VOLTAGE COMPENSATED ECL GENERAL DESCRIPTION — The F10210 and F10610 are Dual 3-Input 3-O utput OR Gates and the F10211 and F10611 are Dual 3-Input 3-O utput NOR Gates. Each gate has three output transistors driven in parallel, with their emitters brought out on

Contextual Info: TC7SP308WBG TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7SP308WBG Dual supply 2-Input AND Gate with Level Translator The TC7SP308 is a dual supply, advanced high-speed CMOS 2-input dual supply voltage interface AND gate fabricated with silicon gate CMOS technology.

Contextual Info: TC7SP308WBG TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7SP308WBG Dual supply 2-Input AND Gate with Level Translator The TC7SP308 is a dual supply, advanced high-speed CMOS 2-input dual supply voltage interface AND gate fabricated with silicon gate CMOS technology.

KPT23

Contextual Info: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate

Contextual Info: F10210 F10211l/» F10610^ F l O ô l l ^ DUAL 3-3 OR • DUAL 3-3 NOR F10K VOLTAGE COMPENSATED ECL GENERAL DESCRIPTION — The F10210 and F10610 are Dual 3-lnput 3-Output OR Gates and the F10211 and F10611 are Dual 3-Input 3-Output NOR Gates. Each gate has three output transistors driven in parallel, with their emitters brought out on

Contextual Info: MC100EPT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate

DASF001419

Abstract: MC100ES60T23EFR2 MC100ES60T23EF MC100ES60T23 75107
Contextual Info: MC100ES60T23 3.3V DUAL DIFFERENTIAL LVPECL TO LVTTL TRANSLATOR 3.3 V Dual Differential LVPECL to LVTTL Translator The MC100ES60T23 is a dual differential LVPECL-to-LVTTL translator. The low voltage PECL levels, small package, and dual gate design is ideal for clock

AZ100ELT22

Abstract: ARIZONA MICROTEK
Contextual Info: AZ100ELT22 Dual CMOS/TTL to Differential PECL Translator DESCRIPTION The AZ100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL Positive ECL levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate

DL140

Abstract: MC100ELT23
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate

474PF

Abstract: analog devices 118a jesd22-A115B AN1575 AN1596 ISL28233 ISL28233FUZ ISL28233SOICEVAL1Z ISL28433 ISL28433SOICEVAL1Z
Contextual Info: Dual and Quad Micropower Chopper Stabilized, RRIO Operational Amplifiers ISL28233, ISL28433 Features The ISL28233 and ISL28433 are dual and quad micropower, chopper stabilized operational amplifiers that are optimized for single and dual supply operation from 1.65V to 6.0V and

4082B

Abstract: TC4082BP HD14082B HFE4082BP scl4082 MC14082B M4082BP MB84082B MLC4082B MN4082B
Contextual Info: - 4082B Dual 4 Input AND Gate 99 -

la 5752

Contextual Info: 5752 DUAL PERIPHERAL AND POWER DRIVER -TRANSIENT-PROTECTED OUTPUTS Com bining dual AND logic gates, high-current switching transistors, and transient suppression diodes in a bipolar m onolithic integrated circuit, this peripheral and power driver meets interface requirem ents

Contextual Info: BF1207 Dual N-channel dual gate MOSFET Rev. 2 — 7 September 2011 Product data sheet 1. Product profile 1.1 General description The BF1207 is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads and an integrated switch. The source and substrate are interconnected. Internal bias circuits enable Direct Current

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D ifferential PECL to TTL Translator M C100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate

pin diagram of 3525

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D ifferential PECL to TTL Translator M C100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate