DS864 Search Results

LOGICSTATE

Abstract: DS8641 unified bus transceiver
Contextual Info: M O TO R O LA DS8641 Q UAD U N IF IE D TRA N SC E IVER C onsists o f fo u r p a ir o f d rive rs a n d receivers w ith th e o u tp u t o f each d riv e r c o n n e c te d t o devices a re in te n d e d th e in p u t o f its m a tin g re ce ive r. T h e s e

C1996

Abstract: DS7640 DS7640J DS8640 DS8640N J14A N14A 5805
Contextual Info: DS7640 DS8640 Quad NOR Unified Bus Receiver General Description Features The DS7640 and DS8640 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from

DS8640J

Abstract: DS8640 DS8640N
Contextual Info: DS7640/DS8640 NATL S E N K E N D {MEMORY} IG E D | bSDllSb T | 7 £TX- 3-0 3 National Semiconductor - ¿ DS7640/DS8640 Quad NOR Unified Bus Receiver General Description Features The DS7640 and DS8640 are quad 2-input receivers de­ signed for use in bus organized data transmission systems

DS7641

Abstract: circuit diagram of FTA receiver DS7641J DS8641N sfto DS8641
Contextual Info: DS7641/DS8641 NATL SENICOND {MEMORY} IDE D | b S O U S h 00bEb3b 5 | National Semiconductor - x - 3 f DS7641/DS8641 Quad Unified Bus Transceiver General Description Features The DS7641 and DS8641 are quad high speed drivers/re­ ceivers designed for use in bus organized data transmission

ds8642n

Contextual Info: CM 3 æ Q ^W\ National Sim Semiconductor Bus Transceivers DS8642 Quad Transceiver Features General Description 100 m A Drive C a p a b ility The D S 8642 is a quad transceiver designed fo r bus organized data transm ission systems te rm in a te d b y 5 0i2

DS005806-1

Contextual Info: DS8641 DS8641 Quad Unified Bus Transceiver Literature Number: SNOSBL7A DS8641 Quad Unified Bus Transceiver General Description Features The DS8641 is a quad high speed drivers/receivers designed for use in bus organized data transmission systems interconnected by terminated 120Ω impedance lines. The

DS8641N

Abstract: DS8641 N16A
Contextual Info: DS8641 Quad Unified Bus Transceiver General Description Features The DS8641 is a quad high speed drivers/receivers designed for use in bus organized data transmission systems interconnected by terminated 120Ω impedance lines. The external termination is intended to be a 180Ω resistor from

DS8641N

Abstract: DS8641 N16A
Contextual Info: General Description Features The DS8641 is a quad high speed drivers/receivers designed for use in bus organized data transmission systems interconnected by terminated 120Ω impedance lines. The external termination is intended to be a 180Ω resistor from

DS864

Abstract: 5B05 DS7640 DS7640J DS8640 DS8640N J14A N14A
Contextual Info: DS7640/DS8640 S3 National J M Semiconductor l DS7640/DS8640 Quad NOR Unified Bus Receiver Features General Description Th e DS7640 and DS8640 are quad 2-input receivers de­ signed fo r use in bus organized data transm ission system s interconnected by term inated 12011 im pedance lines. The

DS8642

Abstract: ds8642n
Contextual Info: DS8642 yw\ National MjmSemiconductor Bus Transceivers DS8642 Quad Transceiver General Description Features The D S 86 4 2 is a quad transceiver designed fo r bus organized data transm ission systems te rm in a te d b y 50£2 im pedance, t h e bus can be te rm in a te d at one o r b oth

circuit diagram of FTA receiver

Contextual Info: DS8641 National Semiconductor DS8641 Quad Unified Bus Transceiver General Description Features The DS8641 is a quad high speed drivers/receivers de­ signed for use in bus organized data transmission systems interconnected by terminated 120H impedance lines. The

DS8640

Contextual Info: DS7640/DS8640 & N ational Semiconductor DS7640/DS8640 Quad NOR Unified Bus Receiver General Description Features The DS7640 and DS8640 are quad 2-input receivers de­ signed for use in bus organized data transmission systems interconnected by terminated 120ft impedance lines. The

DS7641J

Abstract: DS7641 DS8641
Contextual Info: DS7641/DS8641 National mm Semiconductor DS7641/DS8641 Quad Unified Bus Transceiver General Description Features The DS7641 and DS8641 are quad high speed drivers/re­ ceivers designed for use in bus organized data transmission systems interconnected by terminated 120ft impedance

DS8641

Abstract: open collector driver DS8641N National Semiconductor DS8641
Contextual Info: DS8641 & National Semiconductor DS8641 Quad Unified Bus Transceiver General Description Features The DS8641 is a quad high speed drivers/receivers de­ signed for use in bus organized data transmission systems interconnected by terminated 120Q impedance lines. The

DS8641

Abstract: DS8641N MAX1433 B12 diode C1996 N16A
Contextual Info: DS8641 Quad Unified Bus Transceiver General Description Features The DS8641 is a quad high speed drivers receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be a 180X resistor from

AN-259

Abstract: DS3662
Contextual Info: I. INTRODUCTION A single ended Bus is an unbalanced Data Transmission medium, which is timeshared by several system elements. Like any unbalanced system, it is highly susceptible to common-mode noise, such as ground noise and crosstalk. In general, the latter determines the maximum physical

sn76131

Abstract: tlo72cp TOSHIBA 2N3055 M53207P 2N3055 TOSHIBA KIA7313AP kia7640ap LA5530 M5L8155P TBB1458B
Contextual Info: ACTIVE ELECTRONICS COMPONENTS CROSS REFERENCE GUIDE 2SC429GTM 2SC458 2SC458LG 2SC503 2SC504 2SC510 2SC512 2SC519 2SC520A 2SC594 2SC699A 2SC780 2SC809-1 2SC945 2SC3012 2SC3074 2SC3114 2SC3115 2SC3116 2SC3117 2SC3134 2SC3135 2SC3138 2SC3143 2SC3144 2SC3145 2SC3157

NSB3881

Abstract: NSB5881 INS8060 74C911 NSA1298 NSN581 MICROPROCESSOR Z80 7segment 4-DIGIT 7-SEGMENT LED DISPLAY datasheet MULTIPLEX MM2114 NSB7881
Contextual Info: Fairchild Semiconductor Application Note 257 May 1981 I. INTRODUCTION The MM74C911, MM74C912 and MM74C917 are CMOS display controllers that control multiplexing of 8-segment LED displays. These devices each have an on-chip multiplex oscillator and associated logic to easily implement multi-digit

TTL RS422 Level Converter

Abstract: AN216 transceiver rs232 driver receiver RS-357 MIL-STD-188-114 DS75124
Contextual Info: National Semiconductor Application Note 216 Don Tarver December 1978 FO R W A RD Not the least of the problems associated with the design or use of data processing equipment is the problem of providing for or, actually, interconnecting the differing types and models of equipment to form specific proces­

display 7 segmento sm 4105

Abstract: NS_Databook_77 MA1012 MA1002 MM5799 MM5318 MM57109 mm5782n Remote Control Toy Car Receiver IC tx2 MM5871
Contextual Info: MOS/LSI DATABOOK NATIONAL SEMICONDUCTOR i Edge Index by Product Family Clocks Counters/Timers Electronic Organ Circuits TV Circuits Analog to Digital A /D Converters Communications/CB Radio Circuits Watches Calculators Controller Oriented Processor Systems (COPS)

MIC710

Abstract: XC6875 MC1741L C4558C SG425 mc7724c NE533V General Instrument data book 741p SN75107
Contextual Info: Master Index and Cross Reference Guide M IL-M -38510 Program and Chip Information Operational Amplifiers Voltage Regulators Interface Circuits Voltage Comparators Consumer Circuits Other Linear Circuits Package Information and Mounting Hardware Application Notes

DS3662

Abstract: AN-259 C1995 DS8641 DS8834 Trapezoidal Capacitors
Contextual Info: DS3662 National Semiconductor Application Note 259 R V Balakrishnan April 1981 DS3662 The Bus Optimizer external to the Bus Additional noise may be generated due to reflections at imperfect terminations Bus Receviers are designed to respond to high speed transitions and to provide low propagation delays Unfortunately their fast response results in high noise sensitivity The

Contextual Info: National DS3662 ß Semiconductor DS3662 Quad High Speed Trapezoidal Bus Transceiver General Description Features The DS3662 is a quad high speed Schottky bus transceiver intended for use with terminated 1200 impedance lines. It is specifically designed to reduce noise in unbalanced trans­

tlo82

Abstract: TLO82 datasheet lm147 lm117 3.3V JM38510/10901BGA TLO82 application lm723 LM338 model SPICE LM723 pin details lm842
Contextual Info: Worldwide Sales Offices Linear/Mixed-Signal Designer’s Guide Winter 2002 FRANCE ITALY PRC SWEDEN National Semicondutores da América do Sul Ltda. World Trade Center Av. das Nações Unidas, 12.551 22nd Floor - cj. 2207 04578-903 Brooklyn São Paulo, SP Brasil