DQ06 Search Results

Contextual Info: TO SHIBA THMY644071EG-10 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 4,194,304-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY644071EG is a 4,194,304-word by 64-bit synchronous dynamic RAM module consisting of four TC59S6416FT DRAMs and an unbuffer on a printed circuit board.

r2a3

Abstract: r1a10 M1367 M4589
Contextual Info: TOSHIBA THMY728010BEG-80L TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 72-BIT SYNCHRONOUS D RA M MODULE DESCRIPTION The THMY728010BEG is a 8,388,608-word by 72-bit synchronous dynamic RAM module consisting of nine TC59S6408BFTL DRAMs and PLL/Registers on a printed circuit board.

AS8S512K3

Contextual Info: ADVANCED iPEM 64 Mb ASYNC SRAM AS8S2M32PEC 64Mb, 2Mx32 CMOS 3.3V, High Speed Static RAM Integrated Plastic Encapsulated Microcircuit FEATURES DESCRIPTION Integrated Real-Time Memory Array Solution No latency or refresh cycles Parallel Read/Write Interface

Contextual Info: . IBM13M64734CCA 64M x 72 2-Bank Registered/Buffered SDRAM Module Features • 168-Pin Registered 8-Byte Dual In-Line Memory Module • 64Mx72 Synchronous DRAM DIMM • Performance: -260 Device Latency fCK Clock Frequency tAC Clock Access Time 2 -360 -360 Units

Contextual Info: . IBM13M16734JCA 16M x 72 1 Bank Registered/Buffered SDRAM Module Features • 168-Pin Registered 8-Byte Dual In-Line Memory Module • 16Mx72 Synchronous DRAM DIMM • Performance: Device Latency Clock Frequency Clock Access Time -260 -360 -360 Units 2 2

16Mx8

Abstract: pc133 SDRAM DIMM W9D332647LA-333 079R 32X64 32X64 144 pin
Contextual Info: REVISIONS DATE REV I. DESCRIPTION: DESCRIPTION ZONE 6/29/01 LUISA T Ÿ W9D332647LA-333 is a 32Mx64 industry standard 168-pin PC-133 SDRAM DIMM Ÿ Manufactured with 16 16Mx8 400-mil TSOPII-54 PC-133 Synchronous DRAM devices of 12-row, 10-column, 4-bank addressing.

Memory

Abstract: FTS8L32512V
Contextual Info: FTS8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The FTS8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.

MH64S64APFH-5

Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH64S64APFH-5,-5L,-6,-6L,-7,-7L 4294967296-BIT 67108864 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH64S64APFH is 67108864 - word by 64-bit Synchronous DRAM module. This consists of

MH32D64AKQJ-75

Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH32D64AKQJ-75,-10 2,147,483,684-BIT 33,554,432-WORD BY 64-BIT Double Data Rate Synchronous DRAM Module DESCRIPTION The MH32D64AKQJ is 33554432 - word x 64-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

MH32S72APHB

Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH32S72APHB -5,-6,-7 2,415,919,104-BIT 33,554,432 - WORD BY 72-BIT Synchronous DRAM DESCRIPTION The MH32S72APHB is 33554432 - word by 72-bit Synchronous DRAM module. This consists of

ya 741

Abstract: sta 741 a
Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH16S64APHB -5,-6,-7 1,073,741,824-BIT 16,777,216 - WORD BY 64-BIT Synchronous DRAM DESCRIPTION The MH16S64APHB is 16777216 - word by 64-bit Synchronous DRAM module. This consists of eight

CL333

Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH64S72AWJA -5, -6,-7 4,831,838,208-BIT 67,108,864-WORD BY 72-BIT Synchronous DYNAMIC RAM DESCRIPTION The MH64S72AWJA is 67108864 - word x 72-bit Sy nchronous DRAM module. This consist of t hirty -six

128*64

Abstract: transistor GW 93 H GW 94 H
Contextual Info: EDI2KG464128V 4 Megabyte Synchronous Card Edge DIMM Advanced 4x128Kx64, 3.3V Synchronous Flow-Through Module Features • 4x128Kx64 Synchronous • Flow-Through Architecture • Clock Controlled Registered Bank Enables E1\, E2\, E3, E4\ • Clock Controlled Registered Address

LM2576 step up converter

Abstract: LM2576-ADJ*. Circuit Diagram using this IC LM2576-ADJ LM2576 BOOST CONVERTER 671 27000 lm2576 charge LM2576-3.3 PE108 lm2574 constant current LM2576
Contextual Info: Order this document by LM2576/D LM2576 Advance Information Easy Switcher 3.0 A Step-Down Voltage Regulator The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator

Contextual Info: W3J512M64K-XPBX W3J512M64K-XLBX *ADVANCED 4GB – 512M x 64 DDR3 SDRAM 1.35V – 543 PBGA Multi-Chip Package FEATURES  Address/control terminations included  DDR3 Data Rate = 800, 1,066, 1333, 1600* Mb/s  Differential clock terminations included

Contextual Info: Mobile 3rd Generation Intel Core Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Datasheet, Volume 1 of 2 June 2013 Document Number: 326768-006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

Contextual Info: W3J512M64G-XPBX W3J512M64G-XLBX 4GB – 512M x 64 DDR3 SDRAM – 1.5V – 543 PBGA Multi-Chip Package FEATURES  Address/control terminations included  DDR3 Data Rate = 800, 1066, 1333, 1600* Mb/s  Differential clock terminations included

Contextual Info: W3J512M64G-XPBX W3J512M64G-XLBX 4GB – 512M x 64 DDR3 SDRAM – 1.5V – 543 PBGA Multi-Chip Package FEATURES  Address/control terminations included  DDR3 Data Rate = 800, 1066, 1333, 1600* Mb/s  Differential clock terminations included

EDI2AG272129V

Abstract: GW CSSRM1.PC-MFNQ-5C7E-1-700-R18
Contextual Info: EDI2AG272129V 2x128Kx72, 3.3V Sync/Sync Burst SRAM SO-DIMM ADVANCED* FEATURES • 2x128Kx72 Synchronous, Synchronous Burst The EDI2AG272129VxxD1 is a Synchronous/Synchronous Burst SRAM, 72 position DIMM 144 contacts Module, organized as 2x128Kx72. The Module contains four (4) Synchronous Burst

Contextual Info: EDI2GG418128V 4x128Kx18, 3.3V Synchronous Flow-Through SRAM CARD EDGE DIMM FEATURES • 4x128Kx18 Synchronous The EDI2GG418128VxxD2 is a Synchronous SRAM, 60 position Card Edge; DIMM 120 contacts module, organized as 4x128Kx64. The module contains four (4) Synchronous Burst Ram Devices,

DIMM_200

Contextual Info: EDI2GG46464V 4x64Kx64, 3.3V Synchronous SRAM CARD EDGE DIMM FEATURES • 4x64Kx64 Synchronous The EDI2GG46464VxxD is a Synchronous SRAM, 60 position Dual Key; Card Edge DIMM 120 contacts Module, organized as 4x64Kx64. The Module contains eight (8) Synchronous Burst

EDI2CG472128V

Contextual Info: EDI2CG472128V 4x128Kx72, 3.3V Sync/Sync Burst SRAM Dual Key DIMM FEATURES • 4x128Kx72 Synchronous, Synchronous Burst The EDI2CG472128VxxD2 is a Synchronous/Synchronous Burst SRAM, 84 position Dual Key; Double High DIMM 168 contacts Module, organized as 4x128Kx72. The Module contains eight (8)

AN 7580

Abstract: TC59WM815BFT
Contextual Info: TOSHIBA THMD12E11 B70#75#80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 16,777,216-WORD BY 72-BIT DDR SYNCHRONOUS DRAM MODULE DESCRIPTION The THMD12E11B is a 16,777,216-word by 72-bit Double Data Rate synchronous dynamic RAM module consisting of 5 TC59WM815BFT DRAMs on a printed circuit board.

Contextual Info: EDI8F32123C ^ E D I ELECTRONIC DESIGNS, N C .I 128Kx32 Battery Backed SRAM Module ADVANCED Features 128Kx32 bit CMOS Static Random Access Memory with on-board battery backup 128Kx32 Static RAM CMOS, High Speed Module The EDI8F32123C is a 4 megabit Battery Backed SRAM