DN74LS2 Search Results

DN74LS283

Contextual Info: LSTTLDN74LS Series DN74LS283 IW4LS2&3 DN74LS283 4 -b it Binary Full Adders with F ast Carry • Description P-2 D N 7 4 L S 2 8 3 is a 4-b it fu ll adder w ith a “look-ahead” carry. ■ Features • • • “ L ook-ahead” carry for high speed System capability w ith partial “look -ah ead ” carry.

MA161

Abstract: PANASONIC T14 324 PANASONIC DEJJ
Contextual Info: PANASONIC IN D L /E L E K -CICJ 7S De | 6 9 3 2 8 5 2 PANASONIC ^.NDL» |L E C T R 0 N I £ . LT35BS2 0 0 0 7 1 5 5 72Ç 0 7 155 LS TTL DN74LS'>U-X D P f? - 3 I DN74LS242/DN74LS242S DN74LS242/DN74LS242S Quad Bus T ransceivers w ith 3 - state Outputs •« s

DN74LS22

Contextual Info: DN74LS22 LS T TL DN74LS Series DN74LS22 Dual 4 - input P o sitiv e NAND G ates with Open C ollector Outputs P-1 • Description DN 74LS22 contains tw o 4-input positive isolation NAND gate circuits w ith open collector outputs. ■ Features • • • •

74LS28

Abstract: DN74LS28
Contextual Info: DN74LS28 LS T TL DN74LS Series DN74LS28 Quad 2 -input P ositive NOR Buffers P-1 • Description DN 74L S28 contains four 2-input positive isolation N O R buffer gate circuits. ■ Features • • • • High fan-out I o l = 24m A , I o h = —1.2m A Low pow er consum ption (Pti = 22mW typical)

MT25TL512BBA8ESF-0AAT TR

Abstract: DN74LS241 MT35XU512ABA1G12-0AAT TR
Contextual Info: I LS TTL DN74LS Series DN74LS241 DN74LS241 Octal Buffers AND Line D rivers with 3 - s t a t e Outputs • Description P -3 D N 7 4 L S 2 4 1 c o n ta in s tw o b u ff e r b lo c k s, e a c h w ith in d e p e n d e n t o u tp u t- c o n tr o l in p u ts c o m m o n to fo u r c irc u its a n d 3 -sta te

DN74LS26

Contextual Info: I DN74LS26 LS TTL DN74LS Series DN74LS26 Quad 2 -input High-Voltage Interface P ositive NAND Gates P-1 U Description D N 74LS26 contains four 2-input positive isolation NAND b u ffer gate circuits. • Features • • • • • “ Wired” AND capability

MA161

Abstract: umh13
Contextual Info: PANASONIC INDL/ELEK -CIO 75 69 329 52 PANA SON IC . . , >. i , . . f „ k. . _ P E I 1^35555 0007156 7 72C 07 158 IN O L «. E LE CTR ON IC ._ . . . . . . , aJ*t«.*atjfc»*W i'Ci4ifV*siat«?MS*-' LS TTL DN74LS'>U-X D DN74LS243/DN74LS243S T- DN74LS243/DN74LS243S

DN74LS27

Abstract: MA161
Contextual Info: LS TTL DN74LS Series DN74LS27 D N 74L S 2 7 bf0 7 d.LSQ.-j T rip le 3 -input P ositive NOR G ates • Description P-1 D N 74L S27 contains three 3-input positive isolation NOR gate circuits. I Features • • • • Low power consum ption P d = 13.5m W typical

bi 72

Abstract: BI 344
Contextual Info: PANASONIC INDL/ELEK -CIO 72 69 328 52 PANASONIC dËJ 1^33*52 □DQ717M 5 1 72C 0 7 1 7 4 I N D L * ELECTRONIC LS TTL DN74LSS>U—X D DN74LS249/DN74LS249S - |- fr—* I I *-*J DN 74LS249/ DN 74LS249S B C D -to -7 -segment D ecorders/ D r iv e r s (with Open C ollector Outputs

DN74LS245

Abstract: MA161
Contextual Info: DN74LS245 LS TTL DN74LS Series DN74LS245 ro 74LS^4-S' O ctal Bus T r a n sc e iv e r s w ith 3 -sta te O u tp u ts • Description P-3 D N 74LS245 contains eight bus transm itter/receiver circuits with non-inverted outputs. ■ Features • • • • •

DN74LS253

Contextual Info: DN74LS253 LS TTL DN74LS Series DN74LS253 Dual 4 - line to 1 -lin e Data S e le c to r s/M u ltip le x e r s with 3 -s ta te Outputs • Description P-2 D N 74LS253 contains tw o 4-line to 1-line data selector/m ulti­ plexer circuits w ith 3-state outputs.

DN74LS244

Contextual Info: ! LS T T L DN74LS Series DN74LS244 DN74LS244 Octal Buffers AND Line D rivers with 3 -sta te Outputs • Description P-3 DN74LS244 contains two buffer blocks, each with independent output-control inputs common to four circuits and 3-stage non-inverted outputs.

Contextual Info: LS TTL DN74LS Series DN74LS245 DN74LS245 Octal Bus Transceivers with 3-state Outputs H Description P -3 D N 74LS245 contains eight bus transm itter/reciver circuits w ith non-inverted o utputs. • Features • B idirectional transfer or separation capability for tw o 8-bit

Contextual Info: LS TTL DN74LS Series DN74LS279 DN74LS279 Quad 5 - R Latches • Description P-2 DN74LS279 contains four R-S flip-flop circuits. ■ Features • Low power consumption P<j = 19mW typical • Low output impedance • Wide operating temperature range (Ta = - 2 0 to +75°C)

Contextual Info: LS TTL DN74LS Series DN74LS253 DN74LS253 10741^2 S3 Dual 4 - lin e to 1 -lin e Data S e le c to r s/M u ltip le x e r s with 3 -s ta te Outputs • D e sc rip tio n P-2 D N 7 4 L S 2 5 3 c o n t a in s tw o 4 -lin e to 1 -lin e d a ta s e le c t o r /m u lt i­

Contextual Info: LS T T L DN74LS Series DN74LS279 DN74LS279 1074 l5 2 7 ^ Quad H-R Latches P-2 • Description DN74LS279 contains four R-S flip-flop circuits. ■ Features • Low power consumption Pj = 19mW typical • Low output impedance • Wide operating temperature range (Ta = —20 to +75 C)

Contextual Info: PANASONIC INDL/ELEK -CIO 72 6932852 PANASONIC dËJ I N D L * ELECTRONIC 1^33*52 □DQ717M 5 1 72C 0 7 1 7 4 LS TTL DN74LSS>U—X D DN74LS249/DN74LS249S - |- fr—* I I *-*J DN 74LS249/ DN 74LS249S B C D -to -7 -segment D ecorders/ D r iv e r s (with Open C ollector Outputs

Contextual Info: LS TTL DN74LS Series DN74LS26 DN74LS26 DM7aL<i 2^ Quad 2 - input High-Voltage Interface Positive NAND Gates H Description DN74LS26 contains four 2-input positive isolation N A N D buffer gate circuits. H Features • “ Wired” A N D capability • High output withstand voltage V OH g 15V maximum

Contextual Info: PANASONIC INDL/ELEK -CIO 75 ]>F| 1^32052 0007115 2 f 6932652 PANASONIC INDLtELECTRONIC L S T T L 72C 07195 D VYf-Gl DN74LS261 /DN74LS261S D N 7 4 L S '> U - X D N 7 4 L S 2 6 1 D N 7 4 L S 2 6 1S 2 -b it-B y -4 -b it P arallel Binary M ultipliers • ft m

Contextual Info: PANASONIC INDL/ELEK -CIO 75 " •■■: D È I b^BSflSa 00D7E0S 1 . , ■ -': 6932 852 PANASONIC INDL *ELECTRONIC 72C 0 72 05_ O j - W ' / ; LS TTL DN74LS5/U-X DN74LS280/DN74LS280S DN74LS280 DN74LS280S 9-bit Odd/Even P arity G enerators/C heckers D 7 4 L S 2 8 0 /S IÌ, 9 tf-y

IC 74LS247

Abstract: 74LS247
Contextual Info: PANASONIC INDL/ELEK -CIO 75 6932852 PANASONIC DEI INDL*ELECTRONIC tiTasfiSE o□071kl’? a | 72C LS TTL DN74LS&#39;>U-X D" W 07167 h 17 DN74LS247/DN74LS247S DN 74LS247/ DN74LS247S B C D -t o - 7 - segment Decoder/Driver with Open Collector Outputs • m s DN74LS247/SIÌ, + - 7 ’ > a H ' 9 ffi^W BCD-7-b TV 's h m

Contextual Info: LS TTL DN74LS Series D N 7 4 L S 2 5 3 1 DN74LS253 7 4 1 ^ ^ 3 Dual 4-Iin e to 1 -lin e Data Selectors/M ultiplexers with 3 -sta te Outputs • Description P-2 D N 74LS253 contains tw o 4-line to 1-line data selector/m ulti­ plexer circuits w ith 3-state outputs.

74LS24S

Abstract: 74LS24 74LS24d
Contextual Info: PANASONIC 6 9 3 28 52 IN D L/ELEK PANASONIC - C IO 7H D Ìj[ 1.^35555 72C I N D L »E L E C T R O N I C LS TTL DN74LSS/U-X □ □ □ b c130 1 06930 dT D N 7 4 LS 2 4 / D N 7 4 LS 2 4 S DN74LS24/DN74LS24S Quad 2 - input P o s i t i v e NA ND S c h m i t t - T r i g g e r s

DN74LS253

Abstract: MA161 T53T
Contextual Info: LS TTL DN74LS Series DN74LS253 DN74LS253 10741^2 S3 Dual 4 - lin e to 1 -lin e Data S e le c to r s/M u ltip le x e r s with 3 -s ta te Outputs • D e sc rip tio n P-2 D N 7 4 L S 2 5 3 c o n t a in s tw o 4 -lin e to 1 -lin e d a ta s e le c t o r /m u lt i­