DM74LS13 Search Results

Contextual Info: S E M IC O N D U C T O R tm DM74LS138, DM74LS139 Decoders/Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applica­ tions, requiring very short propagation delay times. In

Contextual Info: S E M IC O N D U C T O R tm DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description This device contains four independent gates, each of which perform s the logic exclusive-O R function. Connection Diagram Dual-ln-Line Package

DM 0356

Abstract: ic dM 0365 R dm 0365 r
Contextual Info: S E M IC O N D U C T O R tm DM74LS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs General Descriotion w hich increases th e noise im m unity and transform s a slow ly changing input signal to a fa s t changing, jitte r free output. This device contains fo u r independent gates each of which

54LS138FMQB

Abstract: DM74LS138N DM74LS138 LS139 DM74LS138 Application 54LS138 54LS138DMQB 54LS138LMQB 54LS139 DM74LS139
Contextual Info: DM74LS138, DM74LS139 Decoders/Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be

336 D

Abstract: DM54LS133j 336D
Contextual Info: tß a t i o n a l S e m i c o n d u c t o r DM54LS133/DM74LS133 13-Input NAND Gate General Description This device contains one, 13-input gate that performs the logic NAND functions. Connection Diagram Dual-ln-Line Package 1 16 2 ~ 1— 3 4 5 6 I 15 ill II

Contextual Info: S em ic o nd u cto r DM54LS133/DM74LS133 13-Input NAND Gate General Description This device contains one, 13-input gate that performs the logic NAND functions. Connection Diagram Dual-In-Line Package 1 2 3 4 5 6 16 ~ 1— I II 1 II limili 7 8 15 14 13 12 11

54LS139

Abstract: 54LS138 54LS138DMQB 54LS138FMQB DM54LS138 DM54LS139 DM74LS138 DM74LS139 LS138 LS139
Contextual Info: 54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In

74LS136N

Abstract: 74ls136m DM74LS1
Contextual Info: S E M IC O N D U C T O R tm DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description This device contains fo u r independent gates, each of which perform s the logic exclusive-O R function. Connection Diagram D ual-ln-Line Package

54LS13DMQB

Abstract: 54LS13FMQB 54LS13LMQB DM74LS13M DM74LS13N E20A J14A M14A N14A
Contextual Info: LS13 National Semiconductor 54LS13/DM74LS13 Dual 4-Input Schmitt Trigger General Description This device contains two independent gates each of which perform the logic NAND function. Each input has hysteresis which increases the noise immunity and transforms a slowly

54LS136

Abstract: 54LS136DMQB 54LS136FMQB DM54 DM54LS136J DM74LS136M DM74LS136N J14A M14A
Contextual Info: Jl National Semiconductor 54LS136/DM54LS136/DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic exclusive-OR function. • Alternate Military/Aerospace device 54LS136 is available. Contact a National Semiconductor Sales Office/

54LS133DMQB

Abstract: 54LS133FMQB 54LS133LMQB DM74LS133M E20A J16A M16A N16E W16A
Contextual Info: yw\National ÉSA Semiconductor 54LS133/DM74LS133 13-Input NAND Gate General Description This device contains one, 13-input gate that performs the logic NAND functions. Connection Diagram Dual-ln-Line Package 16 1 2 1 15 3 14 4- 13 5 12 6 7 8 G N D - 1 pill

DM74LS138N

Contextual Info: Revised March 2000 DM74LS138 • DM74LS139 Decoder/Demultiplexer General Description Features These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times.

DM74LS132

Abstract: DM74LS132M DM74LS132N DM74LS132SJ M14A M14D MS-001 N14A
Contextual Info: Revised March 2000 DM74LS132 Quad 2-Input NAND Gate with Schmitt Trigger Input General Description This device contains four independent gates each of which performs the logic NAND function. Each input has hysteresis which increases the noise immunity and transforms a

DM74LS138

Abstract: DM74LS138M DM74LS138N DM74LS138SJ DM74LS139 DM74LS139M DM74LS139N DM74LS139SJ M16A M16D
Contextual Info: Revised March 2000 DM74LS138 • DM74LS139 Decoder/Demultiplexer General Description Features These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times.

DM74LS132

Abstract: DM74LS132M DM74LS132N J14A M14A N14A W14B DM54LS132J DM54LS132W
Contextual Info: DM74LS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs General Description This device contains four independent gates each of which performs the logic NAND function. Each input has hysteresis which increases the noise immunity and transforms a slowly

U092

Contextual Info: S E M IC O N D U C T O R tm DM74LS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs GGIIGrdl Description which increases the noise immunity and transforms a slowly changing input signal to a fast changing, jitter free output. This device contains four independent gates each of which

DM74LS132N

Abstract: DM54LS132J DM54LS132W DM74LS132M J14A M14A N14A W14B Y403
Contextual Info: LS132 ZWA National ÆÆ Semiconductor DM54LS132/DM74LS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs General Description This device contains four Independent gates each of which performs the logic NANO function. Each input has hystere­ sis which increases the noise immunity and transforms a

Contextual Info: February 1992 DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description This device contains four independent gates, each of which performs the logic exclusive-OR function. Connection Diagram Dual-In-Line Package TL/F/9819-1

DM74LS138N

Abstract: 54LS138 54LS138DMQB 54LS138FMQB 54LS138LMQB 54LS139 DM54LS138J LS138 LS139
Contextual Info: June 1989 54LS138/DM54LS138/DM74LS138, 54LS139/DM54LS139/DM74LS139 Decoders/Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­ cations, requiring very short propagation delay times. In

LS138

Abstract: 64 CERAMIC LEADLESS CHIP CARRIER LCC 54LS138 54LS138DMQB 54LS138FMQB 54LS138LMQB 54LS139 DM54LS138J DM54LS138W DM74LS138
Contextual Info: S E M IC O N D U C T O R tm DM74LS138, DM74LS139 Decoders/Demultiplexers General Description cuit. All inputs are clam ped w ith high-perform ance Schottky diodes to suppress line-ringing and sim plify system design. These Schottky-clam ped circuits are designed to be used in

dm74ls13n

Abstract: C1995 DM74LS13 DM74LS13M M14A N14A
Contextual Info: DM74LS13 Dual 4-Input Schmitt Trigger General Description This device contains two independent gates each of which perform the logic NAND function Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing jitter free output

DM54LS133J

Abstract: DM54LS133 DM54LS133E DM54LS133N DM74LS133 DM74LS133M DM74LS133N E20A J16A M16A
Contextual Info: DM54LS133 DM74LS133 13-Input NAND Gate General Description This device contains one 13-input gate that performs the logic NAND functions Connection Diagram Dual-In-Line Package TL F 9818 – 1 Order Number DM54LS133E DM54LS133J DM54LS133N DM74LS133M or DM74LS133N

LS132

Contextual Info: LS132 yw\National ÆÜSemiconductor DM54LS132/DM74LS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs General Description This device contains four independent gates each of which performs the logic NAND function. Each input has hystere­ sis which increases the noise immunity and transforms a

Contextual Info: September 1992 Semiconductor & DM74LS13 Dual 4-Input Schmitt Trigger General Description This device contains two independent gates each of which perform the logic NAND function. Each input has hysteresis which increases the noise immunity and transforms a slowly