DATE CODE FAIRCHILD Search Results

marking codes fairchild

Abstract: HEP08 fairchild marking codes sot-23 TOREX TOP CODE AND8004 t324 SOT-353 A7 marking L5 sot363 xaa643 and8004 D
Contextual Info: AND8004/D ON Semiconductor Logic Date Code and Traceability Marking Prepared by: Douglas Buzard, Logic Product Engineering Edited by: Dianne von Borstel http://onsemi.com APPLICATION NOTE INTRODUCTION This is a summary of ON Semiconductor MOS Logic Device, Date Code, and Traceability Marking. We want to

Contextual Info: User's Guide SLUU238B – February 2006 – Revised October 2013 bqMTester User's Guide EV2300 HDQ FEATURES – Programs and calibrates smart battery modules based on the bq20z80. – Calibrates coulomb counter offset, voltage, temperature, and current. – Programs serial number, date, pack lot code, and other defaults obtained from a golden data image

fairchild 2N7002 MARKING

Abstract: 2N7000-D nds7000
Contextual Info: November 1995 2N7000 / 2N7002 / NDS7002A N-Channel Enhancement Mode Field Effect Transistor General Description Features High density cell design for low RDS ON . These N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density,

11p06

Abstract: FQU11P06
Contextual Info: FQD11P06 / FQU11P06 60V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to

8N60C

Abstract: 8N60CT FQPF8N60CT FAN7602 FQPF8N60CYDTU FQPF8N60C AN-6014 FQPF Series
Contextual Info: FQP8N60C/FQPF8N60C 600V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to

5n50c

Abstract: FQPF*5n50c 5n50
Contextual Info: TM FQP5N50C/FQPF5N50C 500V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to

Fairchild taping

Contextual Info: PLCC-2 DETECTOR RECOMMENDED PRINTED CIRCUIT BOARD PATTERN 0.063 [1.60] 0.095 [2.41] 0.071 [1.80] 2X RECOMMENDED IR REFLOW SOLDERING PROFILE 5 sec MAX soldering time 240°C MAX +5°C/s MAX -5°C/s MAX 60–120 sec Preheating 120–150°C MAX 2002 Fairchild Semiconductor Corporation

Infrared Emitting Diode

Abstract: PLCC2 diode
Contextual Info: PLCC-2 DIODE RECOMMENDED PRINTED CIRCUIT BOARD PATTERN 0.063 [1.60] 0.095 [2.41] 0.071 [1.80] 2X RECOMMENDED IR REFLOW SOLDERING PROFILE 5 sec MAX soldering time 240°C MAX +5°C/s MAX -5°C/s MAX 60–120 sec Preheating 120–150°C MAX 2002 Fairchild Semiconductor Corporation

18N20

Abstract: FQD18N20V2
Contextual Info: TM FQD18N20V2 / FQU18N20V2 200V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to

JESD22-A114

Abstract: NC7WZ16 NC7WZ16L6X NC7WZ16P6X SC70-6 Z16 dual buffer
Contextual Info: NC7WZ16 TinyLogic UHS Dual Buffer Features Description ƒ Ultra-High Speed: tPD 2.4ns Typical into 50pF at 5V VCC ƒ ƒ ƒ High Output Drive: ±24mA at 3V VCC ƒ ƒ Power Down High-Impedance Inputs/Outputs The NC7WZ16 is a dual buffer from Fairchild’s Ultra®

Contextual Info: NC7WZ16 TinyLogic UHS Dual Buffer Features Description ̇ Ultra-High Speed: tPD 2.4ns Typical into 50pF at 5V VCC ̇ ̇ ̇ High Output Drive: ±24mA at 3V VCC ̇ ̇ Power Down High-Impedance Inputs/Outputs The NC7WZ16 is a dual buffer from Fairchild’s Ultra®

Contextual Info: NC7WZ14 TinyLogic UHS Dual Inverter with Schmitt Trigger Inputs Features Description • Ultra-High Speed: tPD 3.2ns Typical into 50pF at 5V VCC •   High Output Drive: ±24mA at 3V VCC The NC7WZ14 is a dual inverter with Schmitt trigger input from Fairchild's Ultra-High Speed (UHS) Series of

Contextual Info: NC7WZ17 TinyLogic UHS Dual Buffer with Schmitt Trigger Inputs Features Description • Ultra-High Speed: tPD 3.6ns Typical into 50pF at 5V VCC •   High Output Drive: ±24mA at 3V VCC The NC7WZ17 is a dual buffer with Schmitt trigger inputs from Fairchild's Ultra-High Speed (UHS) series

Contextual Info: NC7WZ132 TinyLogic UHS Dual 2-Input NAND Gate with Schmitt Trigger Inputs Features General Description • Space saving US8 surface mount package The NC7WZ132 is a dual 2-Input NAND Gate from Fairchild's Ultra High Speed Series of TinyLogic®. The device is fabricated with advanced CMOS technology to

10n20c

Abstract: 10n20
Contextual Info: FQD10N20C / FQU10N20C 200V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to

2N60C

Abstract: fdu2n60c 305 marking code d-pak
Contextual Info: FQD2N60C/FQU2N60C 600V N-Channel MOSFET Features Description • 1.9A, 600V, RDS on = 4.7Ω @VGS = 10 V These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. • Low gate charge (typical 8.5 nC)

IRFU*230A

Abstract: IRFU230A IRFU
Contextual Info: IRFR230B / IRFU230B IRFR230B / IRFU230B 200V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to

Contextual Info: NC7WZ08 TinyLogic UHS Dual 2-Input AND Gate Features General Description • Space saving US8 surface mount package The NC7WZ08 is a dual 2-Input AND Gate from Fairchild's Ultra High Speed Series of TinyLogic. The device is fabricated with advanced CMOS technology to

Contextual Info: NC7NP14 TinyLogic ULP Triple Inverter with Schmitt Trigger Input Features General Description • Space saving US8 package The NC7NP14 is a triple inverter with Schmitt trigger input from Fairchild’s Ultra Low Power ULP Series of TinyLogic®. Ideal for applications where battery life is

9N25C

Abstract: FQPF9N25CT
Contextual Info: FQP9N25C/FQPF9N25C 250V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to

Contextual Info: NC7WV14 TinyLogic ULP-A Dual Inverter with Schmitt Trigger Input Features General Description • 0.9V to 3.6V VCC supply operation The NC7WV14 is a dual inverter with Schmitt trigger from Fairchild’s Ultra Low Power-A ULP-A Series of TinyLogic. ULP-A is ideal for applications that

SO8 package fairchild

Abstract: fd303 f852
Contextual Info: August 1999 FDFS6N303 FETKEY N-Channel MOSFET with Schottky Diode General Description Features Fairchild Semiconductor's FETKEY technology combines a high cell density MOSFET and low forward drop 0.35V Schottky diode into a single surface mount power package. The

6N754

Contextual Info: Final Datasheet FDFS6N754 Integrated N-Channel PowerTrench tm MOSFET and Schottky Diode 30V, 4A, 56mΩ Features General Description „ Max rDS on = 56mΩ at VGS = 0V, ID = 4A The FDFS6N754 combines the exceptional performance of Fairchild's PowerTrench MOSFET technology with a very

S1G15

Contextual Info: FDS9926A Dual N-Channel 2.5V Specified PowerTrench MOSFET General Description Features These N-Channel 2.5V specified MOSFETs use Fairchild Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage