CY7C1332 Search Results

wa8k

Abstract: CY7C1330AV25 CY7C1330AV25-250BGC CY7C1332AV25
Contextual Info: CY7C1330AV25 CY7C1332AV25 PRELIMINARY 18-Mbit 512K x 36/1Mbit x 18 Pipelined Register-Register Late Write Features Functional Description • Fast clock speed: 250, 200 MHz • Fast access time: 2.0, 2.25 ns • Synchronous Pipelined Operation with Self-timed Late

CY7C1331

Abstract: CY7C1332
Contextual Info: CY7C1331 ADVANCED INFORMATION CY7C1332 64K x 18 Synchronous Cache 3.3V RAM D Features D Supports 66ĆMHz Pentium and external cache controller T procesĆ D D D sor cache systems with zero wait states D D D The CY7C1331 is designed for Intel PenĆ tium and i486 CPU-based systems; its

intel 80486

Abstract: CY7C1331 CY7C1332
Contextual Info: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times

Contextual Info: rr o v o iu ii. iTivyi luciy, wai lucu y io , 1990 CY7C1331 CY7C1332 MAR ^•éS « •Ktf .• mm? vssê ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor

51 TAG

Abstract: f AX 1331 intel 80486 7C13 CY7C1331 CY7C1332
Contextual Info: 1CY 7C13 32 CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times

Contextual Info: CY7C1331 CY7C1332 ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features • Direct interface with the processor and external cache controller • Supports 50-M Hz Pentium processor cache systems with zero wait states • Asynchronous output enable T h e CY7C1331 is designed fo r Intel Pen­

Contextual Info: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3 V RAM Direct interface with the processor and external cache controller Asynchronous output enable JEDEC-standard pinout 52-pin PLCC and PQFP packaging Features • Supports 66-MHz Pentium proces­

Contextual Info: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM The CY7C1331 is designed for Intel Pen­ tium and i486 CPU—based systems; its counter follows the burst sequence of the Pentium and the i486 processors. The CY7C1332 is architected for processors

Contextual Info: 5 / CYPRESS CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM F e a tu re s • D irect interface with th e processor and external cache controller S upports 66-M H z P en tiu m proces­ sor cache system s w ith zero w ait states

Contextual Info: CY7C1330AV25 CY7C1332AV25 PRELIMINARY 18-Mbit 512K x 36/1Mbit x 18 Pipelined Register-Register Late Write Features Functional Description • Fast clock speed: 250, 200 MHz • Fast access time: 2.0, 2.25 ns • Synchronous Pipelined Operation with Self-timed Late

Contextual Info: CY7C1331 CY7C1332 ADVANCED INFORMATION P Y P P F ^ c : Features • Supports 50-MHz Pentium 1processor cache systems with zero wait states • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout

C133-10

Abstract: C1336 C133-14 CY7C133 CY7C143 IDT7133 IDT7143
Contextual Info: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns

CY7C133

Abstract: CY7C143 IDT7133 IDT7143
Contextual Info: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns

7C13

Abstract: CY7C133 CY7C143 IDT7133 IDT7143 bit-slice C1335
Contextual Info: fax id: 5202 1CY 7C13 3 CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power

CY7C133

Abstract: CY7C143
Contextual Info: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns

Contextual Info: fax id: 5202 CY7C133 0Y70143 izzazzaar iir ^~-n m n f» o o w r 1 , 1 I n = ~- 2 K x 16 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow sim ultaneous reads of the same m em ory location • 2K x 16 organization

Sony CXA1191M

Abstract: philips ecg master replacement guide FZK101 YD 803 SGS FZK 101 Siemens CMC 707 am radio receiver philips ecg semiconductors master replacement guide CXA1191M ym2612 ecg semiconductors master replacement guide
Contextual Info: Untitled HAM RADIO FILE - Various pinouts saved from the Chipdir 2010 http://www.chipdir.org/ 0512d -0512d +-\/-+ 1 -|5V in gnd in|- 24 2 -|5V in gnd in|- 23 3 -|5V in gnd in|- 22

diode cross reference

Abstract: IDT6168LA55LB CY7C186A-45DMB IDT CROSS REFERENCE LOGIC CY7C128A-25DMB IDT71256L45L32B IDT6168LA70LB cross reference CY7C024-55AC CY7C433-25JC
Contextual Info: IDT/Cypress Product Cross Reference FIFOs FIFOs FIFOs CYPRESS IDT CYPRESS IDT CYPRESS CY7C419-10PC IDT7203L50P CY7C428-20PC IDT7205L50J CY7C460A-25JC IDT7200L12J CY7C419-10JC IDT7203L12P CY7C429-10PC IDT7206L15P CY7C462A-15PC IDT7200L15TP CY7C419-10PC IDT7203L12TP

CY7C133

Abstract: CY7C143 IDT7133
Contextual Info: fax id: 5202 —— — Æ j r r ~ 'f V D I 1 CY7C133 CY7C143 D 17 Q Q IT C O O 2K x 16 Dual-Port Static RAM Functional Description Features • True Dual-Ported memory cells which allow simultaneous reads of the same m em ory location • 2K x 16 organization

tcl 2272

Abstract: 80486 microprocessor block diagram and pin diagram CY7C1331 CY7C1332 zl9j
Contextual Info: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout • 52-pin PLCC and PQFP packaging Featu res • Supports 66-MHz Pentium proces­

Contextual Info: Revision: Monday, January 18, 1993 2 5 0 ^ 2 CYPRESS SEMI CONDUCTOR oooinzi 57E Features •• 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor and external cache controller • Asynchronous output enable

Contextual Info: fax id: 5202 p vXpX : v « *1 CY7C133 CY7C143 - 2K x 16 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells w hich allow sim ultaneous reads of the same m em ory location • 2K x 16 organization • 0.65-micron CMOS fo r optim um speed/power

CY7C133

Abstract: CY7C143 IDT7133 IDT7143 C1338
Contextual Info: 33 CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns

cy3341

Abstract: 64K X 4 CACHE SRAM CY7C190 pasic380 cy7c189 palce22v10 programming guide palce16v8 programming algorithm STATIC RAM 6264 vhdl code for 8-bit parity checker 64x18 synchronous sram
Contextual Info: Product Selector Guide Static RAMs Organization/Density Density X1 X4 X4 SIO 7C147 2147 7C123 7C148 7C149 7C150 7C189 7C190 2148 2149 7C122 9122 93422 7C167A 7C168A 7C169A 7C170A 7C171A 7C172A 7C128A 7C187 7C164 7C166 7C161 7C162 7C185 6264 7C182 7C197 7C194