7C1331 Search Results

81c78

Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Contextual Info: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M

CY7C1331

Abstract: CY7C1332
Contextual Info: 7C1331 ADVANCED INFORMATION CY7C1332 64K x 18 Synchronous Cache 3.3V RAM D Features D Supports 66ĆMHz Pentium and external cache controller T procesĆ D D D sor cache systems with zero wait states D D D The 7C1331 is designed for Intel PenĆ tium and i486 CPU-based systems; its

intel 80486

Abstract: CY7C1331 CY7C1332
Contextual Info: 7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times

MSM 6290

Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+

kx-5t

Abstract: ZTE0
Contextual Info: bSE D • SSÖ'ibbS QGlüllH Features • Supports 50-MHz Pentium proces­ sor cache systems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 12.5 ns with 0-pF load —■ 14 ns with 85-pF load • Two-bit w raparound counter support­

Contextual Info: rr o v o iu ii. iTivyi luciy, wai lucu y io , 1990 7C1331 CY7C1332 MAR ^•éS « •Ktf .• mm? vssê ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor

tcl 2272

Abstract: 80486 microprocessor block diagram and pin diagram CY7C1331 CY7C1332 zl9j
Contextual Info: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout • 52-pin PLCC and PQFP packaging Featu res • Supports 66-MHz Pentium proces­

Contextual Info: Revision: Monday, January 18, 1993 2 5 0 ^ 2 CYPRESS SEMI CONDUCTOR oooinzi 57E Features •• 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor and external cache controller • Asynchronous output enable

27HC642

Abstract: 39C10B PAL22V10APC CY2254SC-1 7132SA70 93L422AM 7024S15 7130SA25 7C198-45C 7006S
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+

51 TAG

Abstract: f AX 1331 intel 80486 7C13 CY7C1331 CY7C1332
Contextual Info: 1CY 7C13 32 7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times

Contextual Info: 7C1331 CY7C1332 ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features • Direct interface with the processor and external cache controller • Supports 50-M Hz Pentium processor cache systems with zero wait states • Asynchronous output enable T h e 7C1331 is designed fo r Intel Pen­

Contextual Info: 7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3 V RAM Direct interface with the processor and external cache controller Asynchronous output enable JEDEC-standard pinout 52-pin PLCC and PQFP packaging Features • Supports 66-MHz Pentium proces­

Contextual Info: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM The 7C1331 is designed for Intel Pen­ tium and i486 CPU—based systems; its counter follows the burst sequence of the Pentium and the i486 processors. The CY7C1332 is architected for processors

Triton P54C

Abstract: cy7c37128 62128 SRAM adapter 48-pin TSOP CY7C37192 CYM74P436 CY3501A CY7C37512 MIB 30 Product Selector Guide
Contextual Info: Product Selector Guide Fast Static RAMs Organization/Density Density X1 X4 X4 SIO X8 4K 7C147 2147 7C123 7C148 7C149 7C150 2148 2149 7C122 9122 93422 16K 7C167A 7C168A 7C128A 6116 64K to 72K 7C187 7C164 7C166 7C185 6264 7C182 256K to 288K 7C197 7C194 7C195

Contextual Info: 7C1331 CY7C1332 ADVANCED INFORMATION P Y P P F ^ c : Features • Supports 50-MHz Pentium 1processor cache systems with zero wait states • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout