CACHE RAM 64K X 8 Search Results

pin diagram for quad core i7 processor

Abstract: 1336-L6
Contextual Info: •vvrMWW>>>>>>>>wwvi ,^ ? É ïr CY7C1336 ' CYPRESS 64K x 32 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states The CY7C1336 is a 3.3V 64K by 32 synchronous cache RAM

CY7C1346

Contextual Info: fax id: 1112 PRELIMINARY CY7C1346 64K x 36 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 mW standby power (f=0, L version) The CY7C1346 is a 3.3V 64K by 36 synchronous-pipelined cache SRAM designed to support zero wait state secondary

intel 80486

Abstract: CY7C1331 CY7C1332
Contextual Info: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times

64KX32

Abstract: 7C13 CY7C1329
Contextual Info: fax id: 1080 1CY 7C13 29 CY7C1329 PRELIMINARY 64K x 32 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 mW standby power (f=0, L version) The CY7C1329 is 3.3V 64K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary

80486 microprocessor block diagram and pin diagram

Abstract: 64KX32 CY7C1336
Contextual Info: 36 PRELIMINARY CY7C1336 64K x 32 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states • 64K by 32 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times

64KX32

Abstract: CY7C1336
Contextual Info: 336 PRELIMINARY CY7C1336 64K x 32 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states • 64K by 32 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times

80486 microprocessor block diagram and pin diagram

Abstract: 64KX32 CY7C1336
Contextual Info: fax id: 1092 PRELIMINARY CY7C1336 64K x 32 Synchronous 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states • 64K by 32 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times

80486 microprocessor block diagram and pin diagrams

Abstract: EQUIVALENT cd 1031 cs cd 1031 80486 microprocessor block diagram and pin diagram 80486 microprocessor pin out diagram block diagram of processor 80486 EQUIVALENT cd 1031 80486 microprocessor description 80486 microprocessor features 80486* diagram circuits
Contextual Info: CY7C1031 CY7C1032 64K x 18 Synchronous Cache RAM Features Functional Description • Supports 66-MHz Pentium microprocessor cache systems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 8.5 ns • Two-bit wraparound counter supporting Pentium microprocessor and 486 burst sequence 7C1031

51 TAG

Abstract: f AX 1331 intel 80486 7C13 CY7C1331 CY7C1332
Contextual Info: 1CY 7C13 32 CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times

80486 microprocessor block diagram and pin diagram

Abstract: CY7C1344 3dp01 CY7C1344-117AC
Contextual Info: fax id: 1110 PRELIMINARY CY7C1344 64K x 36 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 64K by 36 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times

MCM69T618

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Synchronous Pipelined Cache Tag RAM The MCM69T618 is a 1M–bit synchronous fast static RAM with integrated tag compare function. It is designed to address tag RAM for 512KB, 1MB, or 2MB secondary cache as well as to be used as a data RAM for 512KB caches. This

80486 microprocessor block diagram and pin diagrams

Abstract: 80486 microprocessor block diagram and pin diagram r2868 EQUIVALENT cd 1031 intel 80486 CY7C1031 CY7C1032 80486 microprocessor 80486 microprocessor pin out diagram
Contextual Info: 1CY 7C10 32 CY7C1031 CY7C1032 PRELIMINARY 64K x 18 Synchronous Cache RAM Features Functional Description • Supports 66-MHz Pentium microprocessor cache systems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 8.5 ns • Two-bit wraparound counter supporting Pentium microprocessor and 486 burst sequence 7C1031

EQUIVALENT cd 1031 cs

Abstract: 7C1031
Contextual Info: CY7C1031 CY7C1032 PRELIM INARY 64K x 18 Synchronous Cache RAM • Direct interface with the processor and external cache controller • Asynchronous output enable • VOs capable of 33V operation • JEDEC-standard pinout • 52-pin PLCC and PQFP packaging

Contextual Info: fax id: 1092 - » * h h h h h h h h h h h & *j ; . CY7C1336 PRELIMINARY L lF C I I j O O : 64K x 32 Synchronous 3.3V Cache RAM Features Functional Description • Supports 66-MHz m icroprocessor cache system s with zero wait states • 64K by 32 common I/O

Contextual Info: Revision: Monday, January 18, 1993 2 5 0 ^ 2 CYPRESS SEMI CONDUCTOR oooinzi 57E Features •• 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor and external cache controller • Asynchronous output enable

Contextual Info: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3 V RAM Direct interface with the processor and external cache controller Asynchronous output enable JEDEC-standard pinout 52-pin PLCC and PQFP packaging Features • Supports 66-MHz Pentium proces­

Contextual Info: ADVANCE M IC R O N * MT3LST3264 P , MT3LST6464(P) 32K/64K x 64 SYNCHRONOUS SRAM MODULES 32K/64K x 64 SRAM SYNCHRONOUS SRAM MODULE w ith Tag RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT (Front View)

MCM69F618C

Abstract: MCM69F618CTQ10 MCM69F618CTQ12 MCM69F618CTQ8R MCM69F618CTQ9 MCM69F618CTQ9R
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Flow–Through BurstRAM Synchronous Fast Static RAM The MCM69F618C is a 1M–bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the 68K Family, PowerPC, 486, i960, and Pentium microprocessors. It is organized as 64K

tcl 2272

Abstract: 80486 microprocessor block diagram and pin diagram CY7C1331 CY7C1332 zl9j
Contextual Info: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout • 52-pin PLCC and PQFP packaging Featu res • Supports 66-MHz Pentium proces­

Contextual Info: ADVANCE M im a N I i i i - . i - i i - j i 'v MT3LST3264 P , MT5LST6464(P) 32K, 64K x 64 SYNCHRONOUS SRAM MODULE 32K, 64K x 64 SRAM SYNCHRONOUS SRAM MODULE with Tag RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES

Contextual Info: ADVANCE V / lir^ c a rn fS J I MT3LST3264(P , MT3LST6464(P) 32K/64K x 64 SYNCHRONOUS SRAM MODULES 32K/64K x 64 SRAM SYNCHRONOUS SRAM MODULE with Tag RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT (Front View)

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM The MCM69F618A is a 1M bit synchronous fast static RAM designed to pro­ vide a burstable, high performance, secondary cache for the 68K Family, Pow­ erPC™, 486, i960™ and Pentium™ microprocessors. It is organized as 64K

Contextual Info: MOTOROLA Order this document by MCM69T61&/D SEMICONDUCTOR TECHNICAL DATA Product Preview MCM69T618 64K x 18 Bit Synchronous Pipelined Cache Tag RAM The MCM69T618 is a 1M bit synchronous fast static RAM with integrated tag compare function. It is designed to address tag RAM for 512KB, 1MB, or 2MB

Contextual Info: IS61S6432 IS61S6432 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM FEATURES DESCRIPTION The ICSI IS61S6432 is a high-speed, low-power synchronous static RAM designed to provide a burstable, high-performance, secondary cache for the Pentium , 680X0™, and PowerPC™ microprocessors. It is organized