C10E Search Results

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6-Bit Universal Up/Down Counter M C10E136 M C100E136 The MC1OE/100E136 is a 6-bit synchronous, presettable, cascadable universal counter. The device generates a look-ahead-carry output and accepts a look-ahead-carry input. These two features allow for the cacading

LC313

Contextual Info: MOTOROLA SEM ICONDUCTO R TECHNICAL DATA 6-Bit D Latch M C10E150 M C100E150 The C10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent and input data transitions propagate through to the output. A

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8 -B it R ip p le C o u n te r M C10E137 M C 100E137 The C10E/100E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPS output edge rates.

Contextual Info: MOTOROLA SEM ICO N D U CTO R bflE ]> • b 3 b ? S S E GD'lSDfia THE M O T O R O L A SC TECHNICAL DATA Product Preview Dual T T L to Differential E C L Translator i nom L O G I C 1 M C10ELT24 M C100ELT24 The C10ELT/100ELT24 is a TTL to differential E C L translator.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C10EL05 M C100EL05 2 -ln p u t D iffe re n tia l A N D /N A N D The MC1OEL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5-Bit 2:1 M ultiplexer The M C 10E/100E158 contains five 2:1 multiplexers with differential outputs. The output data are controlled by the Select input SEL . M C10E158 MC100E158 • 600ps Max. D to Output • 800ps Max. SEL to Output

MC100EL35

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA JK Flip-Flop M C10EL35 M C100EL35 The M C10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock.

Contextual Info: MOTOROLA Order this document by C10EP89/D SEMICONDUCTOR TECHNICAL DATA Product Preview M C10EP89 Coaxial Cable Driver The C10EP89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially useful in digital video

Contextual Info: MOTOROLA °rder Number ^C10EP56/D Semiconductor Components M C10EP56 SO-20, DW SUFFIX PLASTIC WIDE SOIC PACKAGE CASE 751D-05 ORDERING INFORMATION C10EP56DW SOIC PIN DESCRIPTION Product Preview Dual D ifferential 2:1 M ultiplexer • • • • • • •

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information M C10EL15 M C 100EL15 1:4 C lock Distribution Chip The C10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if

Contextual Info: MOTOROLA 0^rN" " “S Semiconductor Components M C10EP35 SO -8, D SUFFIX 8 -L E A D PLASTIC SOIC PACKAGE CASE 751 -06 ORDERING INFORMATION M C10EP35D SOIC Product Preview JK Flip Flop TRUTH TABLE • • • • • • • • • • 300ps Propagation Delay

Contextual Info: MOTOROLA °^rN" " ~ Semiconductor Components M C10EP16 SO -8, D SUFFIX 8-LEAD PLASTIC SOIC PACKAGE CASE 751 -06 /s;tòér^gi ;m m ORDERING INFORMATION C10EP16D SOIC Product Preview D ifferential R eceiver • 160ps Propagation Delay PIN DESCRIPTION PIN FUNCTION

Contextual Info: MOTOROLA Order this document by C10EP32/D SEMICONDUCTOR TECHNICAL DATA Product Preview C10EP32 v 2 Divider The M C10EP32 is an integrated ^ 2 divider. The differential clock inputs and the Vbb allow a differential, single-ended or AC coupled interface to the device. If used, the V bb output should be bypassed to

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Bit Ripple Counter M C10E137 M C 100E137 The C10E/100E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPS output edge rates.

MC100EL32

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA h-2 Divider M C10EL32 M C100EL32 The C10EL/100EL32 is an integrated - 2 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to

MC100EL32

Contextual Info: MOTOROLA SEM ICONDUCTO R TECHNICAL DATA 2 Divider M C10EL32 M C100EL32 The M C 1 0 E L / 1 0 0 E L 3 2 is an integrated +2 divider. T he differential clock inputs an d the V b b allow a differential, single-ended or A C coupled interface to the device. If used, the V b b output should be b y p a sse d to

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 1:2 Fanout D ifferen tial PECL to TTL Translator M C10ELT26 M C100ELT26 The C10ELT/100ELT26 is a 1:2 fanout differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1:4 C lock D istribution Chip M C10EL15 M C 100EL15 The M C 10E L /100E L15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA T T L to D iffe re n tia l ECL T ra n s la to r M C10ELT24 M C 100ELT24 The C10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5V, -5.2V or -4.5V and ground are required. The small outline 8-lead SOIC package and the single gate of

c10e

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1:6 Differential Clock Distribution Chip M C 10E211 M C 100E211 The M C10E/100E211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device can be driven by e ither a differential or single-ended ECL or, if positive power

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3 -B it 4:1 M u x -L a tc h T h e M C 1 0 E /1 0 0 E 1 5 6 c o n ta in s th re e 4:1 M C10E156 M C100E156 m u ltip le x e rs fo llo w e d by tra n s p a re n t la tc h e s w ith d iffe re n tia l o u tp u ts . W h e n b o th L a tc h E n a b le s

Contextual Info: MOTOROLA “ "“i S Semiconductor Components M C10EP58 S O -8 , D SUFFIX 8 -L E A D PLASTIC SOIC PACKAGE CASE 751 -06 ORDERING INFORMATION M C10EP58D Product Preview 2:1 M ultiplexer • • • • • • • • • 300ps Typical Propagation Delay

Toggle flip flop IC

Abstract: flip flop 945 flip flop j k
Contextual Info: MOTOROLA Order this document by C10EP35/D SEMICONDUCTOR TECHNICAL DATA Product Preview C10EP35 «IK Flip Flop The M C10EP35 is a higher speed/low voltage version of the EL35 JK flip flop. The J/K data enters the master portion of the flip flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a

Contextual Info: MOTOROLA 0rd6rNn ^ " Semiconductor Components M C10EP32 S O -8 , D SUFFIX 8 -L E A D PLASTIC SOIC PACKAGE CASE 751 O RDERING INFORMATION W* / * , r - * * SV iiW ^ J F 1 * .v j / ,v j I / V dA vi M C10EP32D "• SOIC VÜ Product Preview + 2 D iv id e r PIN DESCRIPTION