BCR 150 V- 12 Search Results

SC-75

Contextual Info: BCR 129T NPN Silicon Digital Transistor 3 • Switching circuit, inverter, interface circuit, driver circuit • Built in bias resistor R1=10kΩ 2 C 3 1 R1 1 2 B E VPS05996 EHA07264 Type Marking BCR 129T WVs Pin Configuration 1=B 2=E Package 3=C SC-75 Maximum Ratings

Contextual Info: BCR 129S NPN Silicon Digital Transistor Array Preliminary data • Switching circuit, inverter, interface circuit, driver circuit • Two galvanic internal isolated Transistors in one package • Built in bias resistor (R1=10kΩ) Type Marking Ordering Code Pin Configuration

Contextual Info: BCR 129 NPN Silicon Digital Transistor 3 • Switching circuit, inverter, interface circuit, driver circuit • Built in bias resistor R1=10kΩ 2 C 3 1 VPS05161 R1 1 2 B E EHA07264 Type Marking BCR 129 WVs Pin Configuration 1=B 2=E Package 3=C SOT-23 Maximum Ratings

VPS05604

Contextual Info: BCR 129S NPN Silicon Digital Transistor Array 4 • Switching circuit, inverter, interface circuit, 5 6 driver circuit • Two galvanic internal isolated Transistors with good matching in one package • Built in bias resistor (R1=10kΩ) 2 3 1 C1 B2 E2

Contextual Info: SIEMENS BCR 129S NPN Silicon Digital Transistor Array Preliminary data • Switching circuit, inverter, interface circuit, 4 5 driver circuit 6 , > ^ • Two galvanic internal isolated Transistors in one package -'-'jjl Jl I • Built in bias resistor (R-i=10k£2)

W967d6hb

Abstract: W967 CRAM 256mb
Contextual Info: W967D6HB 128Mb Async./Page,Syn./Burst CellularRAM 1. GENERAL DESCRIPTION Winbond CellularRAM products are high-speed, CMOS pseudo-static random access memories developed for low-power, portable applications. The device has a DRAM core organized. These devices include an industrystandard burst mode Flash interface that dramatically increases read/write bandwidth compared with other lowpower SRAM or Pseudo SRAM offerings.

Contextual Info: BCR 129 NPN Silicon Digital Transistor Preliminary data • Switching circuit, inverter, interface circuit, driver circuit • Built in bias resistor R1=4.7kΩ Type Marking Ordering Code Pin Configuration BCR 129 WVs 1=B Q62702- Package 2=E 3=C SOT-23 Maximum Ratings

digital transistor array

Abstract: marking 702 sot363
Contextual Info: SIEMENS BCR 169S PNP Silicon Digital Transistor Array • Switching circuit, inverter, interface circuit, driver circuit • Two galvanic internal isolated Transistors in one package • Built in bias resistor (R1=4.7kQ) Cl U 12 FI FI FI U lii ÜJ Type Marking Ordering Code Pin Configuration

Contextual Info: W957D6HB 128Mb Async./Burst/Sync./A/D MUX 1. GENERAL DESCRIPTION Winbond x16 ADMUX products are high-speed, CMOS pseudo-static random access memory developed for lowpower, portable applications. The device has a DRAM core organized. These devices are a variation of the industrystandard Flash control interface, with a multiplexed address/data bus. The multiplexed address and data functionality

MT45W8MW16BGX-7013LWT

Abstract: MT45W8MW16 FBGA DECODER MT45W8MW16BGX
Contextual Info: 128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/ Page/Burst CellularRAM 1.5 Memory Async/Page/Burst CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: • Single device supports asynchronous, page, and burst operations • VCC, VCCQ voltages – 1.70–1.95V VCC

Contextual Info: 128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Features Async/Page/Burst CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: • Single device supports asynchronous, page, and burst operations • VCC, VCCQ voltages – 1.70–1.95V VCC – 1.7–3.3V1 VCCQ

synchronous nor flash

Abstract: BCR10 M69KB128AB bcr100
Contextual Info: M69KB128AB 128 Mbit 8Mb x16 1.8 V Supply, Burst PSRAM Preliminary Data Feature summary • Supply voltage – VCC = 1.7 to 1.95 V core supply voltage – VCCQ = 1.7 to VCC for I/O buffers ■ User-selectable operating modes – Asynchronous modes: Random Read, and

Contextual Info: um Cermet Chip Resistors Series BC AC FEATURES _ • Standard Sizes BC - 1206 AC - 0805 • 1%, 2%, 5% tolerance • ±100PPM/°C, ± 200PPM /°C, ± 300PPM /°C • Zero ohm jumper • Cermet Resistance Element • High Purity Alumina Substrate

Contextual Info: 128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Features Async/Page/Burst CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: • Single device supports asynchronous, page, and burst operations • VCC, VCCQ voltages: 1.7V–1.95V VCC 1.7V–3.3V1 VCCQ • Random access time: 70ns

Contextual Info: 128 Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Features Async/Page/Burst CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: • Single device supports asynchronous, page, and burst operations • VCC, VCCQ voltages: 1.7V–1.95V VCC 1.7V–3.3V1 VCCQ

PF38F1030W0Y

Abstract: PF38F2030 PF38F 3117* intel
Contextual Info: Intel Wireless Flash Memory W18 128-Mbit W18 Family with Synchronous PSRAM Product Features Datasheet Device Architecture — Flash Die Density: 32, 64 or 128-Mbit — PSRAM Die Density: 16 or 32-Mbit — x16 Non-Mux or ADMux I/O Interface Option — Bottom or Top Flash Parameter

MT45W8MW16BGX

Abstract: MT45W8MW16BGX-701LWT 700000H-7FFFFFH
Contextual Info: PRELIMINARY‡ 8 MEG x 16 ASYNC/PAGE/BURST CellularRAM MEMORY 128Mb BURST CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: Ball Assignment 54-Ball VFBGA • Single device supports asynchronous, page, and burst operations • Vcc, VccQ Voltages 1.7V–1.95V Vcc

MT45W8MW16BGX

Abstract: MT45W8MW16BGX-701LWT BDQ8 CSP3-20
Contextual Info: 8 MEG x 16 ASYNC/PAGE/BURST CellularRAM 1.5 MEMORY 128Mb BURST CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: Ball Assignment 54-Ball VFBGA • Single device supports asynchronous, page, and burst operations • Vcc, VccQ Voltages 1.7V–1.95V Vcc 1.7V–1.95V VccQ

cr1 5 p26z

Contextual Info: 128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Features Async/Page/Burst CellularRAMTM 1.5 MT45W8MW16BGX Features Figure 1: • Single device supports asynchronous, page, and burst operations • VCC, VCCQ voltages: – 1.7V–1.95V VCC – 1.7V–3.3V1 VCCQ

numonyx 106 ball

Abstract: numonyx 107-ball Numonyx StrataFlash M18
Contextual Info: Numonyx StrataFlash Wireless Memory L18 SCSP 768-Mbit L18 Family with Synchronous PSRAM Datasheet Product Features „ „ „ „ Device Architecture — Flash Die Density: 128 or 256-Mbit — PSRAM Die Density: 32 or 64-Mbit — x16 Non-Mux or ADMux I/O Interface Option

M69KB128AA

Abstract: BCR10
Contextual Info: M69KB128AA 128 Mbit 8Mb x16 1.8V Supply, Burst PSRAM PRELIMINARY DATA Features summary • SUPPLY VOLTAGE – VCC = 1.7 to 1.95V core supply voltage – VCCQ = 1.7 to 1.95V for I/O buffers ■ USER-SELECTABLE OPERATING MODES – Asynchronous Modes: Random Read, and

Contextual Info: M69KB128AA 128 Mbit 8Mb x16 1.8V Supply, Burst PSRAM PRELIMINARY DATA Features summary • SUPPLY VOLTAGE – VCC = 1.7 to 1.95V core supply voltage – VCCQ = 1.7 to 1.95V for I/O buffers ■ USER-SELECTABLE OPERATING MODES – Asynchronous Modes: Random Read, and

BCR100

Contextual Info: 70 128Mb/64Mb Async/Page/Burst CellularRAM 1.5 Memory Figure 1: Features • Single device supports asynchronous, page, and burst operations • VCC, VCCQ voltages: 1.7V–1.95V VCC 1.7V–1.95V VCCQ • Random access time: 70ns • Burst mode READ and WRITE access:

A19 SMD transistor

Abstract: HYE18P32160AC HYE18P32160AW-15
Contextual Info: Data Sheet, V2.2, July 2004 HYE18P32160AW-12.5 HYE18P32160AW-15 32M Synchronous Burst CellularRAM CellularRAM Memory Products N e v e r s t o p t h i n k i n g . Data Sheet, V2.2, July 2004 HYE18P32160AW-12.5 HYE18P32160AW-15 32M Synchronous Burst CellularRAM