B1A11 Search Results

b1a12

Abstract: M390S2950MTU M390S2950MTU-C1H M390S2950MTU-C1L M390S2950MTU-C75 PC133 registered reference design
Contextual Info: Preliminary PC133/100 Low Profile Registered DIMM M390S2950MTU M390S2950MTU SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on 128Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S2950MTU is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S2950MTU consists of eighteen CMOS 128Mx4 bit

M390S6453DT1

Abstract: M390S6453DT1-C7A M390S6453DT1-C7C PC133 registered reference design
Contextual Info: PC133 Registered DIMM M390S6453DT1 M390S6453DT1 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 32Mx8, 4Banks 8K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S6453DT1 is a 64M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung

b1a12

Abstract: PC133 SDRAM registered DIMM 512MB samsung pc133 sdram 512mb ECC unbuffered K4S560832E M390S2858ET1-C7A M390S2858ETU-C7A M390S3253ET1-C7A M390S3253ETU-C7A M390S6450ET1-C7A M390S6450ETU-C7A
Contextual Info: 256MB, 512MB, 1GB Registered DIMM SDRAM SDRAM Registered Module 168pin Registered Module based on 256Mb E-die with 72-bit ECC Revision 1.4 May 2004 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.4 May 2004

Contextual Info: SDRAM MODULE Preliminary KMM377S6450AT2 Revision History Revision 1 November 1998 -Corrected DQ# at the input of SDRAM(D5) as DQ16~19 @Functional Block Diagram REV. 1 Nov. 1998 Preliminary KMM377S6450AT2 SDRAM MODULE KMM377S6450AT2 SDRAM DIMM (Intel 1.1 ver. Base)

Contextual Info: KMM377S6428T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Rev. 0.1 May. 1999 KMM377S6428T3 PC100 Registered DIMM KMM377S6428T3 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on Stacked 64Mx4, 4Banks, 4K Ref., 3.3V SDRAMs with SPD

Contextual Info: M390S6450CT1 PC133 Registered DIMM M390S6450CT1 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S6450CT1 is a 64M bit x 72 Synchronous

Contextual Info: M390S2858CT1 PC133 Registered DIMM M390S2858CT1 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S2858CT1 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S2858CT1 consists of eighteen CMOS Stacked

CDC2509

Abstract: KM44S16030BT
Contextual Info: Preliminary KMM378S3227BT SDRAM MODULE KMM378S3227BT SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on Stacked 32Mx4, 4Banks 4K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE • Performance range The Samsung KMM378S3227BT is a 32M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung KMM378S3227BT consists of eighteen CMOS Stacked

M377S6428AT3-C1H

Abstract: M377S6428AT3-C1L
Contextual Info: M377S6428AT3 PC100 Registered DIMM Revision History Revision 0.1 April 29, 2000 - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice." Rev. 0.1 Apr. 2000 M377S6428AT3 PC100 Registered DIMM M377S6428AT3 SDRAM DIMM (Intel 1.2 ver Base)

KMM377S6450AT3-GL

Abstract: KMM377S6450AT3-GH
Contextual Info: SDRAM MODULE KMM377S6450AT3 KMM377S6450AT3 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung KMM377S6450AT3 is a 64M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung KMM377S6450AT3 consists of eighteen CMOS 64Mx4

KMM377S6428T3-GH

Abstract: KMM377S6428T3-GL
Contextual Info: KMM377S6428T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Revision 0.2 (April 29, 2000) - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice."

CDC2509

Abstract: b1a12 M377S6450BT3 M377S6450BT3-C1H M377S6450BT3-C1L
Contextual Info: M377S6450BT3 PC100 Registered DIMM M377S6450BT3 SDRAM DIMM Intel 1.2 ver Base 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M377S6450BT3 is a 64M bit x 72 Synchronous

KMM377S1620CT3-GL

Abstract: CDC2509
Contextual Info: SDRAM MODULE KMM377S1620CT3 KMM377S1620CT3 SDRAM DIMM 16Mx72 SDRAM DIMM with PLL & Register based on 16Mx4, 4Banks, 4K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung KMM377S1620CT3 is a 16M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung KMM377S1620CT3 consists of eighteen CMOS 16Mx4

D1U eeprom

Abstract: KMM390S6428T-GA KMM390S6428T PC133 registered reference design
Contextual Info: KMM390S6428T Preliminary PC133 SDRAM MODULE Revision History Revision 0 Feb. 1999 • PC133 first published REV. 0 Feb. 1999 Preliminary PC133 SDRAM MODULE KMM390S6428T KMM390S6428T SDRAM DIMM (RCC 0.8ver. Base) 64Mx72 SDRAM DIMM with PLL & Register based on Stacked 64Mx4, 4Banks, 4K Ref., 3.3V SDRAMs with SPD

PC133 registered reference design

Abstract: KMM390S6450AT1-GA
Contextual Info: KMM390S6450AT1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions

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Abstract: K4S1G0632B PC133 SDRAM registered DIMM 512MB samsung M390S2950BTU-C7A M390S2953BT1-C7A M390S5658BT1-C7A M390S5658BTU-C7A M390S6553BT1-C7A M390S6553BTU-C7A K4S510832
Contextual Info: 512MB, 1GB, 2GB Registered DIMM SDRAM SDRAM Registered Module 168pin Registered Module based on 512Mb B-die with 72-bit ECC Revision 1.0 January 2004 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.0 January 2004

Contextual Info: M390S6450DT1 PC133 Registered DIMM M390S6450DT1 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S6450DT1 is a 64M bit x 72 Synchronous

M390S2858CT1

Abstract: M390S2858CT1-C7A M390S2858CT1-C7C PC133 registered reference design K4S510632C-TC75 B1A1
Contextual Info: M390S2858CT1 PC133 Registered DIMM M390S2858CT1 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S2858CT1 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S2858CT1 consists of eighteen CMOS Stacked

PC133 registered reference design

Contextual Info: M390S2858BT1 PC133 Registered DIMM Revision History Revision 0.0 May. 2000 • PC133 first published REV. 0 May. 2000 M390S2858BT1 PC133 Registered DIMM M390S2858BT1 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD

Contextual Info: KMM377S1620CT3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Rev. 0.1 May. 1999 KMM377S1620CT3 PC100 Registered DIMM KMM377S1620CT3 SDRAM DIMM 16Mx72 SDRAM DIMM with PLL & Register based on 16Mx4, 4Banks, 4K Ref., 3.3V Synchronous DRAMs with SPD

Contextual Info: KMM377S3320T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Rev. 0.1 May. 1999 KMM377S3320T3 PC100 Registered DIMM KMM377S3320T3 SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx4, 4Banks, 4K Ref., 3.3V Synchronous DRAMs with SPD

Contextual Info: KMM377S6450AT3 PC100 Registered DIMM Revision History Revision 0.1 May 27, 1999 • Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER. • Skip ICC4 value of CL=2 in DC characteristics in datasheet. • Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER.

Contextual Info: PC100 Registered DIMM M377S2858AT3 M377S2858AT3 SDRAM DIMM Intel 1.2 ver Base 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M377S2858AT3 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M377S2858AT3 consists of eighteen CMOS Stacked

PC133 registered reference design

Contextual Info: Shrink-TSOP KMM390S6520BN Preliminary PC133 Registered DIMM Revision History Revision 0.0 July 29. 1999, Preliminary - First generation of datasheet. REV. 0.0 July. 1999 Shrink-TSOP KMM390S6520BN Preliminary PC133 Registered DIMM KMM390S6520BN SDRAM DIMM